<p>These are names for certain kinds of strategies for how the CPU gets to write to certain more CPU-distant memories.</p>
<p>Most CPU memory writes are cached; they're bundled together with other writes to contiguous blocks of memory. At some point in the future, the bytes in the cache are written to the actual memory.</p>
<p>But most GPUs cannot see the CPU caches (some GPUs built into the CPU itself do have access to CPU caches, but for discrete GPUs, that's basically impossible). So the problem is this: how do you make CPU writes actually go out into the real memory, so that the GPU can read them?</p>
<p>While there are specific tools to force data out of the CPU's caches, there are alternative memory structures that (mostly) bypass the need to do this.</p>
<p><a href="https://en.wikipedia.org/wiki/Write_combining" rel="nofollow noreferrer">Write combining</a> is a fairly automatic memory structure which is more coherent than a cache. There is a small buffer of storage, whose size is the smallest size that the target memory can perform a single write to. When you start writing to write-combined memory, the architecture takes note of the address of that write and figures out where in the target memory that entire buffer will go to. Any subsequent writes that map to the same target address will go into the buffer. But any writes that map to a different address will force the buffer to be written and then cleared, so that the newly written data can be stored in the block aimed at a different target address.</p>
<p>As an example, let's say that the write combining block size is 256 bytes. So if we start writing to address 0x00001204, this means that any writes to 0x00001200-0x000012FF will all be stored in the write combining block. But if we then write to 0x00001300, then the block aimed at 0x000012XX will be written to the actual RAM.</p>
<p>Write combining sometimes has further requirements, such as an expectation of contiguous writes in ever-increasing byte counts. That is, if you try to write bytes out of order, or skip bytes, it can cause the buffer to be flushed out to the memory ahead of time.</p>
<p><a href="https://en.wikipedia.org/wiki/Cache_(computing)#WRITE-BACK" rel="nofollow noreferrer">Write-through</a> is an alternative to write-back. Write-back is just... caching. Values are written into the cache, and are only written to main memory when the cache needs that space or if the cache line is explicitly forced to be written.</p>
<p>Write-through is basically uncached writing. The value gets written to the cache, but it is also written to memory. It writes <em>through</em> the cache.</p>

CC BY-SA 4.0
2023-01-06T08:04:04.960Z
Thanks for your answer. So the difference is: with WRITE_COMBINE the cache is small, and copied to memory whenever clients try to write data to an address "far" from that ; with WRITE_BACK the cache is big, and copied to memory when it's "full" (or when requested explicitly by clients)?
wip
CC BY-SA 4.0
2022-12-19T15:23:32.207Z
2022-12-19T15:23:32.207Z
Nicol Bolas
<p><a href="https://learn.microsoft.com/en-us/windows/win32/direct3d12/descriptor-heap-configurability-summary" rel="nofollow noreferrer">Direct3D 12 Programming Guide section &quot;Descriptor Heap Configurability Summary&quot;</a> lists different &quot;CPU Page Properties Supported&quot; for Shader Visible and Non Shader Visible Descriptor Heaps, <code>WRITE_COMBINE</code> and <code>WRITE_BACK</code>:</p>
<p><a href="https://i.sstatic.net/o0U7C.png" rel="nofollow noreferrer"><img src="https://i.sstatic.net/o0U7C.png" alt="table summarizing information about Shader and non-Shader visible heap support" /></a></p>
<p>What is the difference between <code>WRITE_COMBINE</code> and <code>WRITE_BACK</code> in the context of D3D12 <code>D3D12_CPU_PAGE_PROPERTY</code> APIs?</p>
<p>It would be great to know the source at the origin of this terminology, in order to remember more easily what they mean.<br />
Why are <code>WRITE_COMBINE</code> and <code>WRITE_BACK</code> named like this?<br />
What is &quot;combined&quot; during <code>WRITE_COMBINE</code>, and what is the &quot;back&quot; movement during <code>WRITE_BACK</code>?</p>

<directx12>
What's different between D3D12_CPU_PAGE_PROPERTY_WRITE_COMBINE and D3D12_CPU_PAGE_PROPERTY_WRITE_BACK, and why they're named like that?
wip
# What's different between D3D12_CPU_PAGE_PROPERTY_WRITE_COMBINE and D3D12_CPU_PAGE_PROPERTY_WRITE_BACK, and why they're named like that?

(Asked by: username_0 on 2022-12-19)

[Direct3D 12 Programming Guide section "Descriptor Heap Configurability Summary"](https://learn.microsoft.com/en-us/windows/win32/direct3d12/descriptor-heap-configurability-summary) lists different "CPU Page Properties Supported" for Shader Visible and Non Shader Visible Descriptor Heaps, `WRITE_COMBINE` and `WRITE_BACK`:

[![table summarizing information about Shader and non-Shader visible heap support](https://i.sstatic.net/o0U7C.png)](https://i.sstatic.net/o0U7C.png)

What is the difference between `WRITE_COMBINE` and `WRITE_BACK` in the context of D3D12 `D3D12_CPU_PAGE_PROPERTY` APIs?

It would be great to know the source at the origin of this terminology, in order to remember more easily what they mean.  
Why are `WRITE_COMBINE` and `WRITE_BACK` named like this?  
What is "combined" during `WRITE_COMBINE`, and what is the "back" movement during `WRITE_BACK`?

**Tags:** directx12


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## 1 answers

### Answer by username_1 on 2022-12-19. Score: 2

These are names for certain kinds of strategies for how the CPU gets to write to certain more CPU-distant memories.

Most CPU memory writes are cached; they're bundled together with other writes to contiguous blocks of memory. At some point in the future, the bytes in the cache are written to the actual memory.

But most GPUs cannot see the CPU caches (some GPUs built into the CPU itself do have access to CPU caches, but for discrete GPUs, that's basically impossible). So the problem is this: how do you make CPU writes actually go out into the real memory, so that the GPU can read them?

While there are specific tools to force data out of the CPU's caches, there are alternative memory structures that (mostly) bypass the need to do this.

[Write combining](https://en.wikipedia.org/wiki/Write_combining) is a fairly automatic memory structure which is more coherent than a cache. There is a small buffer of storage, whose size is the smallest size that the target memory can perform a single write to. When you start writing to write-combined memory, the architecture takes note of the address of that write and figures out where in the target memory that entire buffer will go to. Any subsequent writes that map to the same target address will go into the buffer. But any writes that map to a different address will force the buffer to be written and then cleared, so that the newly written data can be stored in the block aimed at a different target address.

As an example, let's say that the write combining block size is 256 bytes. So if we start writing to address 0x00001204, this means that any writes to 0x00001200-0x000012FF will all be stored in the write combining block. But if we then write to 0x00001300, then the block aimed at 0x000012XX will be written to the actual RAM.

Write combining sometimes has further requirements, such as an expectation of contiguous writes in ever-increasing byte counts. That is, if you try to write bytes out of order, or skip bytes, it can cause the buffer to be flushed out to the memory ahead of time.

[Write-through](https://en.wikipedia.org/wiki/Cache_(computing)#WRITE-BACK) is an alternative to write-back. Write-back is just... caching. Values are written into the cache, and are only written to main memory when the cache needs that space or if the cache line is explicitly forced to be written.

Write-through is basically uncached writing. The value gets written to the cache, but it is also written to memory. It writes *through* the cache.

> **Comments:**
> **username_0**: Thanks for your answer. So the difference is: with WRITE_COMBINE the cache is small, and copied to memory whenever clients try to write data to an address "far" from that ; with WRITE_BACK the cache is big, and copied to memory when it's "full" (or when requested explicitly by clients)?  

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