High-Resolution, Low-Power Time Synchronization an Oxymoron No More Thomas Schmid, Prabal Dutta, Mani B. Srivastava In a nutshell… • If you need the functionality of a piece of equipment, but it costs too much to run continuously, what can you do? • Simple – turn it off when you don’t need it. • If you only need a high-frequency (=highpower) clock occasionally, use a slower clock (=lower-power) as your primary clock and only turn on the high-frequency clock when necessary. Outline • Introduction • Achieving High Precision – Why we need it – How to do it • Achieving Low Power – Temperature controlled clock • Virtual High-Resolution Time (VHT) – Two different implementations • Results • Related work Introduction • Time synchronization is important. • Mean synchronization accuracy has not improved much below 1.5 μs. – Low-power synchronization at that level is nonexistent. • Two problems: – Radio hardware support needed to achieve highprecision message time-stamping. – High-frequency clocks are needed to achieve highprecision time-keeping. Introduction 2 • “Conventional wisdom holds that to achieve a certain level of time synchronization precision, a free-running timebase of comparable frequency is needed.” – Time-keeping costs grow linearly with the required precision. – Power draw from a 8 MHz crystal is 340 times the power draw of 32 kHz crystal. – 8 Mhz->125 ns. 32 kHz->31.3 μs • According to the authors, the conventional wisdom is no longer true. Why the conventional wisdom is wrong: • There are modern, low-power radios that support sub-microsecond level message timestamping. • You can use 2 clocks, one fast (8 MHz) and one slow (32 kHz), and only power the fast one when you need the extra speed. – This allows you to scale the power needs with access. – Precision on-demand. Achieving High Precision • Need 2 things: – A high-resolution clock source (frequency f0) • A clock can only estimate an event time to a resolution of 1/f0. – Message time-stamping with accuracy ε < +/- 1/f0 • A node needs to know its frequency error with respect to a reference clock. Without error correction nodes need to resequence very frequently. • If you have both of those, then you just need to measure clock offsets between network nodes, and apply an existing frequency error estimation technique. Frequency Error • Time offset measurement method: – cA(t) is quantized time count = f0*t, cB(t)=(f0+fe)*t • If both time counts start at 0 then we get: • We can use that equation to determine the limit to the resolution with which the frequency error can be estimated. Frequency Error 2 • We can find the minimum resolution of the frequency error estimation by taking the difference between two measurements that are separated by one tick: • Example: – f0=8MHz, T=10s, error resolution is 0.0125 ppm. – f0=32.768kHz, T=10s, error resolution is 3.05 ppm. • High frequencies also help improve error estimation. – The greater the clock frequency, the shorter the interval of time needed to synchronize a pair of clocks to a given frequency error resolution. Accurate Timestamps • Need to capture the timestamp in hardware. • Most radios have a dedicated interrupt line that fires at a particular point during the reception or transmission of a message. – RBS, Reference Broadcast Synchronization, timestamps the first byte sent or received. One of the first. 10 μs accuracy at ~1 MHz. – FTSP, Flooding Time Synchronization Protocol, timestamps multiple bytes. Accuracy of 1.5 μs. The current standard. Timestamp Tests • Two different radios: – TI CC2420, dedicated interrupt line. – Atmel RF230, interrupt line is multiplexed with other radio state-machine events. • 2.4 GHz, max data-rate is 250 kbit/s. • Used IEEE 802.15.4, that uses message frames. TI CC2420 • Difference between Start of Frame delimiter rising at the transmitter and at the receiver. • Mean of 3.162 μs, and 3.166 μs. SD is 41.26 ns and 40.9 ns. 95% of measurements fall within a 160 ns window. • Mean of 3.58 ns, SD of 58.14 ns. Atmel RF230 • Mean time between transmitter and receiver is 17.4 μs. SD of 290 ns and 370 ns. • SD is about 7x higher than TI CC2420. Results • On TI CC2420, need a clock frequency of 12.5 MHz to guarantee with high probability that the message timestamp can be resolved to within +/- 1 clock tick. • CC2420 will achieve a better time synchronization accuracy when using high frequency clocks. Achieving Low Power • Need 2 things: – Low-frequency clocks – Infrequent communication • Low-frequency: Power draw from a 8 MHz crystal is 340 times the power draw of 32 kHz crystal. – Telos platform at 32 kHz, in sleep mode draws 7.2 μA at 3.0V or 4.5 μA at 2.3V. • Infrequent communication: The longer the resynchronization interval, the more likely environmental temperature and clock drift will create error. Achieving Clock Stability • Temperature-Compensated Crystal Oscillators (TCXO). – Hardware solution to regulating frequency with respect to temperature. – Work well, but are too big and expensive. • Temperature Compensated Time Sync (TCTS) – Software lookup-table solution using a regular temperature sensor (no new hardware). TCTS • One node has access to an accurate and stable timebase. • All other nodes synchronize to the main node, and during resynchronization each node calculates its current frequency error. • Temperature and frequency error are cached in a frequency vs. temperature table. • At each resychronization, if the current temperature is in the database, then the node will not resychronize because no new time estimate is required. • Eventually all operating temperatures will be covered, essentially providing a TCXO timebase. TCTS Experiment Results • Temperature in chamber slowly changed from -10 oC to 60 oC. • Quadratic equation: fe(T)=-A*(T-T0)2+B, A=temperature coefficient, T0=20 oC for room temperature, B=frequency error offset. • Can use the equation to find frequency error estimates for previously unobserved temperatures. Full TCTS Experiment • Recalibration set to 30 seconds. • TCTS maintains tight synchronization. • Power draw: temperature measurement = 66.5 μJ. Sending a message 600 μJ. Virtual High-Resolution Time • Need High-Accuracy – High-frequency clocks – Accurate time-stamping mechanism • Need Low-Power – Low-frequency clock – Infrequent synchronization • Enter VHT: high-frequency clock only when you need it, otherwise use a low-frequency clock. VHT Overview • During active periods the high-frequency clock is turned on, and a hardware counter counts the number of high-frequency clock ticks that occur during each low-frequency clock interval. • There are ρ0 = fH/fL high-frequency clock ticks during each low-frequency tick. • When an event of interest occurs, the system records both counters (high-frequency counter is reset every low-frequency tick). • The event time is: tevent=CL*ρ0+ ρ. Microcontroller-based VHT • Need a microcontroller with: – 2 clock inputs, driven by the two different oscillators – 2 timers with capture and compare modes, sourced by the two clocks – Some way to trigger a capture of the highfrequency timer. Microcontroller-based VHT on CC2420 • Both capture units are on the interrupt line. • Another capture unit is triggered on the lowfrequency rising edge to capture the highfrequency counter. (Sync event) • The event captures l0 and h1. Event time: Microcontroller-based VHT on CC2420 • Drawbacks: – Uses all available timer resources. No more ADC. – Limited width of the counters. • On the CC2420 they are only 16-bits. • A 32-bit counter at 8 MHz will overflow every 5 minutes. FPGA-based Dedicated VHT • Smart adder adds 16-bit counter to LTC counting register, or stores LTC register directly. FPGA-based Dedicated VHT • Drawbacks: – Draws more power than if it were directly implemented in a microcontroller. – Timers are off-chip, which means we need a communication interface between the microcontroller and the FPGA. Microcontroller-based VHT Results • Modified timer so incoming or outgoing messages get the 32 kHz clock and the phase of the high-frequency timer. • Experiment: – 5 nodes running VHT, synchronizing every 10 seconds – A sixth node sends a beacon every 2 seconds with the other nodes timestamp. Results • The 8 MHz virtual clock provides maximum time resolution of 0.125 μs. • Average accuracy of one tick, with SD of 0.645 μs. Power Draw • Uses different hardware. • Polling interval of 1.6 seconds (radio is turned on to take a sample every 1.6 seconds), duty-cycle of 0.77%. • 5 orders of magnitude difference in power draw. • Power draw is 3x lower with VHT. Power model for VHT-equipped Node • For a given duty cycle (dc) running LowPower-Listening (LPL): – Regular node: – VHT node: – P0 is leakage, Plclk is the slow clock, Phclk is the fast clock, and Pradio is the radio power draw. Conclusions • System designers used to have to choose between low-power and high-resolution. • Don’t need to make that decision anymore because now both are available. – VHT allows better than 1 μs time-keeping precision and an order-of-magnitude improvement in power draw compared to conventional techniques at 0.1% or lower radio duty cycles. Related Work • Reference Broadcast Synchronization (RBS) was one of the first synchronization protocols. – Not really relevant when low-level software- or hardware-based time-stamping mechanisms are available. • Timing-sync Protocol for Sensor Networks (TPSN). – Should have 2x better performance than RBS, but they do not implement clock drift estimation. – IEEE implemented a protocol that is very similar to TPSN that gets better than 100ns accuracy. More Related Work • Flooding Time Synchronization Protocol (FTSP) – Current de facto standard. – Nothing has yet improved on it, but it does not take into account propagation delays. • Gradient Time Synchronization Protocol (GTSP) – Corrects the problem where nodes are radio neighbors but are members of different synchronization trees. Even More Related Work • Syntonistor – a device for synchronization that locks onto 60 Hz AC noise found in buildings. – Get accuracy better than 1 ms while only consuming only 58 μW. – Low power is comparable, but accuracy is not. • Harmonia time-synchronization system – Closest to VHT. Relies on a TCXO-driven clock that provides a stable 1 Hz signal. – May not be widely applicable, while VHT is drop in.