Q: Makefile To Compile Multiple Files I am trying to compile my TCP client server program through Make but I can not get everything linked together.
My current files I am using:
 client.c
 connectioninfo.c
 connectioninfo.h
 server.c
 splinter.c
 splinter.h

All .c files use the two .h files in their code.
Here is what my makefile looks like:
 splinter : server.o client.o splint.o connectioninfo.o
 server.o: server.c splinter.h connectioninfo.h
      gcc -o server server.c
 client.o: client.c splinter.h connectioninfo.h
      gcc -o client client.c
 splint.o: splinter.c splinter.h connectioninfo.h
      gcc -o splint splinter.c
 connectioninfo.o: connectioninfo.c splinter.h connectioninfo.h
      gcc -o connectioninfo connectioninfo.c

I get the errors :
  gcc -o server server.c
  /tmp/ccAu7sDE.o: In function `main':
  server.c:(.text+0x6e): undefined reference to `alloc_serverinfo'
  server.c:(.text+0x87): undefined reference to `getconnectioninfo'
  server.c:(.text+0xcd): undefined reference to `port'
  server.c:(.text+0xdc): undefined reference to `host'
  server.c:(.text+0xe7): undefined reference to `s_bind'
  server.c:(.text+0x1a5): undefined reference to `s_accept'
  collect2: error: ld returned 1 exit status
  Makefile:4: recipe for target 'server.o' failed
  make: *** [server.o] Error 1

Any idea on how i can get everything to compile? Thanks

A: You are currently calling gcc to build applications, not object files, for each source file. Please use the option -c and give the appropriate file name for the output, for example
gcc -c -o server.o server.c

Now change the rule for the application so that it is linked:
splinter : server.o client.o splint.o connectioninfo.o
    gcc -o splinter server.o client.o splint.o connectioninfo.o

To debug your Makefile and see what commands will be generated without executing them you can use
make -n

You can call commands explicitly like i.e. gcc -c -o server.o server.c in your shell to check each step.
Oh, and you can name the object file splinter.o which is compiled from the source file splinter.c. There will be no problem with the resulting executable splinter.
Now you could also simplify your Makefile to use automatic variables; please see the documentation for make.
All put together, you could use:
splinter : server.o client.o splinter.o connectioninfo.o
    gcc -o $@ $^

server.o: server.c splinter.h connectioninfo.h

client.o: client.c splinter.h connectioninfo.h

splinter.o: splinter.c splinter.h connectioninfo.h

connectioninfo.o: connectioninfo.c splinter.h connectioninfo.h

%.o: %.c
    gcc -o $@ $<


A: For compiling multiple files you will need to do it in two steps:


*

*Compile each source file into an object file (note the use of -c to compile only) as the busybee suggested:


    somefile1.o : somefile1.c
        gcc -c somefile1.c -o somefile1.o

    somefile2.o : somefile2.c
        gcc -c somefile2.c -o somefile2.o



*Link your object files - create myapp executable


    myapp : somefile1.o somefile2.o
        gcc somefile1.o somefile2.o -o myapp

