1. Field of the Invention
This invention is directed to the field of large data input/output (I/O) transfer into, and out of, large compute systems and large data storage systems. It is particularly directed towards reducing the data access latency times and increasing the data I/O transfer rates for compute clients processing extremely large data sets within large, shared-memory compute systems.
2. Description of Prior Art
Demand is growing to find solutions to the “big data” challenge faced by government and business, for example, in areas such as fraud detection, remote sensor data analysis, financial modeling, social network analysis, and risk analysis. Many data intensive computing applications need to process an enormous amount of data in a timely manner, and if too much time is spent loading a required data set into a compute client's memory, then the entire production workflow will be delayed. The same logic holds for processes that are generating very large data sets. The newly generated large data sets need to be quickly made available for the next step in the larger production workflow. To support such an environment, a supercomputer architecture is required that incorporates hundreds or thousands of CPU cores for handling multiple processing threads and supersized memories to hold more of the very large data sets. Simply put, the more data the supercomputer can process at any given time, the quicker the results are presented to decision makers. When it comes to mission-critical pattern discovery problems in government and business, whoever obtains the answers first is one step ahead of their adversary or competitor.
The challenges to meeting “big data” demands are many:
The compute hardware needs to be able to scale up to an extraordinary level—thousands of CPU cores and multiple terabytes of memory—which is far beyond the capacity of any commodity X86 server. Computer software needs to be able to take advantage of the scaled-up hardware platform. And, an extremely efficient data access input/output system that can quickly load the “big data” into system memory and just as quickly store the processed data onto reliable media is needed to complete the system.
The ability to build larger and larger compute systems has been facilitated by advances in massively parallel compute system techniques, algorithmic resource orchestration techniques (Map Reduce and others), low-cost/high-performance CPU's, and the advent of both open-source and proprietary Parallel File Systems. Parallel File Systems such as “Lustre” [See “Lustre scalable storage” Copyright 2006 Cluster File Systems —Rights owned by ORACLE Corp.], and IBM's GPFS (General Parallel File System) [Refer to F. B. Schmuck and R. L Haskin, GPFS: a shared-disk file system for large computing clusters, in proceedings of Conference of Files and Storage Technologies (FAST'02), 2002] have allowed these newer and larger parallel compute systems to scale up to higher and higher numbers of compute nodes and compute-cores and still have enough File System I/O Bandwidth to allow for very good compute performance on many classes of applications.
Parallel File Systems generate very high “Total I/O” Bandwidth levels by utilizing multiple “File System Data Storage Servers” like the dual socket server 110 in FIG. 1 (Lustre uses “Object Storage Servers (OSS's) and IBM's GPFS uses NSD Servers (Network Shared Disk Servers)). Each File System Data Storage Server (OSS or NSD Server) is attached to one or more “Data Storage Devices,” like 109 in FIG. 1, via a storage network fabric 106 that in many HPC environments is implemented using Infiniband (IB) switches and (IB) Host Channel Adapters (HCA's) 104. The “Data Storage Device” 109 often consists of a “Storage Controller” 107, and a High-Performance or High-Capacity Disk Storage Devices 108 or Solid-State Disk (SSD) Storage Devices (many new systems are using SSDs in combination with SATA or SAS Disks to balance total I/O operations with total storage capacity). Sometimes “File System Data Storage Servers,” like 110 in FIG. 1, are paired with Storage Subsystems, like 109 in FIG. 1, that are implemented as raw “Trays-of-Disks” without Disk-Controllers. These Trays-of-Disks are referred to as JBOD's (just a Bunch Of Disks), and require additional Data-Block management software to run within the “File System Data Storage Server” 110 to accomplish the functionality required for the “JBOD” to serve as a suitable Storage Device 109. The “Zetta File System,” or ZFS [open source licensed By Oracle Corp.], is one candidate application for handling JBOD's and is being utilized by the Lawrence Livermore National Labs (LLNL) team, in combination with the Lustre File System as a part of their “Next-Generation” Sequoia Super Computer installation which hopes to have a “Total File System I/O Bandwidth of between 500 GB/s and 1000 GB/s.
The data blocks in the Parallel File System are “Striped” or spread across multiple “File System Data Storage Servers,” like the 111 grouping of FIG. 1, and their associated collective sets of Storage Devices 113 in FIG. 1. The sequence of events for a compute client to receive the data stored in the Parallel File Systems after a client data request is:
1—The data blocks are copied from “Disk Storage Devices —108 data storage locations” and into “Storage Controllers 107 memory—Data Movement #1,
2—The data blocks are then copied from “Storage Controller 107 memory” into “File System Data Storage Servers 110 memory”—Data Movement #2,
3—The data blocks are then copied from all of the “File System Data Storage Servers 110 memory” into the client 101-1 memory space—Data Movement #3.
Moving the data blocks three times before they can be utilized is very inefficient, but for many parallel applications the inefficiency is accepted as current practice and the job schedules are allocated by compute time required as well as data I/O transfer time. All of these “Data Movement processes” are running in parallel, simultaneously across all of the File System Data Storage Servers and their respective Storage Controllers and Disk Storage Devices. The aggregate data I/O speed for the entire File System is a function of the available bandwidth for all of the File System Data Storage Servers operating in unison. The grouping of File System Data Storage Servers 111 in FIG. 1 has the potential I/O bandwidth of 8 GB/s because each of the 4 servers can maintain 2 GB/s and the set of 2 disk Storage Devices, 109 in FIG. 1, can each maintain 4 GB/s.
The total I/O performance of the Parallel File Systems can be scaled up by adding more File System Data Storage Servers, see 201 in FIG. 2, and more Disk Storage Devices, 202 in FIG. 2. The additional server and storage resources allow the example Parallel File System in FIG. 2 to provide an aggregate potential data I/O bandwidth of 20 GB/s instead of the original potential of I/O speed of 8 GB/s. The combination of adding more Storage Servers and more Storage Devices creates a very high Total potential I/O Bandwidth solution for use by the massively parallel compute systems and their applications.
The use of Parallel File Systems, like Lustre and GPFS, for massively parallel compute systems has worked well because each compute node in the massively parallel compute system typically needs to use only a small portion of the I/O Bandwidth to accomplish its compute tasks and to deliver intermediate or final results. The High Speed Parallel File Systems in use at Large Supercomputing Centers are used to take very rapid “Snap-shots” of intermediate compute results for complex compute jobs that can sometimes take days or weeks to complete. The snapshots are called “Check Points” and they require very High Total I/O Bandwidth since each of the many thousands of compute nodes are sending copies of their intermediate compute results out for analysis and algorithmic tuning.
One of the HPC systems at Oak Ridge National Laboratory, Jaguar, has over 26,000 compute nodes with approximately 180,000 compute-cores, and its Lustre Parallel File Systems operate at 240 GB/s and 44 GB/s. That meant that each “File System Client”, like 101-2 in FIG. 1, on a small compute node, could “Simultaneously Share” about 9-12 MB/s on average of the “Total File System I/O,” when all of the many thousands of compute nodes were working together in parallel on one large problem. The peak File System I/O performance for a single specific “File System Client,” like 101-2 in FIG. 1, on a Jaguar compute node was just over 1.25 GB/s. This means that the peak “File System Client” I/O Bandwidth performance available for a single node on Jaguar is 0.5% of the “Total I/O” Bandwidth available from the entire File System. This level of I/O performance works very well for the large scale scientific simulation problems that have been tailored to work on the massively scaled parallel compute systems like “jaguar” with it's thousands of separate compute nodes that typically begin processing jobs with a few small-sized data sets for each compute node. But there are many additional types of compute problems that require the manipulation and processing of very large data sets that must first be loaded into the memory space of one compute system before processing can begin.
Many US Government projects have requirements to rapidly access and process large numbers of files in the 5 GB to 15 GB range. There are many fielded systems are producing data sets at a rate of 1 Tera Byte (TB) or more per hour, and there are several ongoing projects that produce data sets that range from 4 to 6 TB in size. The users of these large, Multi-TB data sets would like to have the ability to rapidly load and process entire multi-TB files in “Large Shared Memory” compute systems, like 112 in FIGS. 1 and 2, and utilize the compute systems 100's or 1000's of compute-cores to reduce the “Raw multi-TB” data sets into useful, user friendly, result sets. The task of crafting algorithms to process these Very Large Multi-TB data sets is much easier to accomplish if the entire data set can fit within the internal memory address space of a large “Common Global Shared Memory” compute system and be acted on by all of the 100's or 1000's of compute-cores resident with the single large “Common Global Shared Memory” compute system.
An example of using a “Common Global Shared Memory” compute system in combination with a typical Parallel File System to process very large data sets can be further examined by using the performance characteristics of Oak Ridge's “Jaguar” Supercomputer. Jaguar's “Peak I/O Performance” for a single compute node was 1.25 GB/s. Using that I/O Bandwidth value for the I/O performance of a single “File System Client” within a “Large Shared Memory” compute system, such as 112 in FIG. 1 or 2, results in a 15 GB file loading into the “Large Shared Memory” Compute system in just 12 seconds. An acceptable data I/O transfer time for many situations. But the time required to load a 6 TB file from a modular storage device or a current implementation of a typical Parallel File System, 111 and 201 and 202 from FIG. 2, into the same large “Common Global Shared Memory” compute system, 101-1 in 112 of FIG. 2, would be at least 4,800 seconds! Having 100's or 1000's of processing cores waiting over 4,000 seconds for a data set to load into a system like 112 in FIG. 1 or 2, would be a terrible waste of an expensive compute resource.
The “Peak I/O bandwidth” available for a specific application compute client from the total aggregate I/O provided by the Parallel File Systems' entire collection of “File System's Data Storage Servers,” like 111 and 201 added together in FIG. 2, can be limited by many of the physical and logical elements that interconnect a typical Lustre or GPFS Parallel File System implementation.
A significant implementation element that can limit the “I/O Bandwidth Performance” for a specific “File Systems' Client” is the total number, and bandwidth capacity, of the physical or logical I/O network pathways available to link the specific “Application Compute Client” with the “Data Storage Servers” of the Parallel File System. The designs and implementations of “Application Compute Clients” will vary across the range of commercially available Parallel File Systems. The number of I/O network pathways supported by a specific “Application compute client” implementation, combined with the I/O bandwidth available for “Application compute client” use within each supported I/O network pathway, will significantly affect the total I/O Bandwidth for the specific “File System Client.”
The physical linkage between the “Application compute client” processes 101-1 and the collective set of “File System Data Storage Servers” 111 and 201, is depicted in FIGS. 1 and 2 with the HCA's 104 supporting the external I/O connectivity from the 101-1 Client within the large “Common Global Memory Compute System,” 112, and the Infiniband Switch 105 that in-turn provides the I/O network pathway connectivity to the entire collection of “File System Data Storage Servers” 111 and 201 in FIG. 2.
One specific current example of how a Parallel File System's design and implementation of its “Application compute client” can limit the total amount of File System I/O Bandwidth available to a specific “Application compute client” is Lustre's current Client design and implementation. As currently implemented, a Lustre Client can have one physical Infiniband connection. This means that a QDR (Quad Data Rate=4 GB/s) or DDR (Double Data Rate=2 GB/s) IB connection between a Lustre File System Client 101-1 and HCA 104 in FIG. 2 over to the 105 IB switch, would be the only I/O pathway between the Lustre File System Client and the collection of “File System Data Storage Servers” (OSS's for Lustre). Current Lustre Client instances utilizing a single QDR IB connection as its I/O network pathway to the “File System Data Storage Servers” have been able to achieve sustained I/O rates of up to 3.2 GB/s after considerable tuning adjustments were made, and while the Lustre Client was servicing several separate processes within a “Large Shared Memory” compute system with data blocks from several unique files that were striped across all of the “File System Data Storage Servers” (OSS servers) within the specific Lustre File System.
A redesign and re-implementation of the Lustre Client software would be required to permit the Lustre “File System Client” process to utilize two or more physical IB connections as its I/O network pathway to the “File System Data Storage Servers.” An implementation that allowed a Lustre File System Client to utilize two QDR IB connections would potentially be able to achieve I/O bandwidth rates up to a maximum of 6 or 7 GB/s, but even this level of File System Client I/O Bandwidth performance is still a very small percentage of the total I/O Bandwidth available from Parallel File Systems that can achieve 100's of GB/s of total I/O Bandwidth. If the File System Client 101-1 in 112 of FIG. 2 was able to operate at 6 GB/s of I/O Bandwidth, it would still be utilizing less than ⅓ of the total potential File System I/O of 20 GB/s derived from the Parallel File System's “File System Data Storage Servers” in 111 and 201 in FIG. 2.
Existing Parallel File Systems (like Lustre and GPFS) perform well at distributing a small share of the total file system I/O to the thousands of compute nodes in today's large supercomputing compute clusters. However, for cases where very large data files need to be quickly loaded into a single, multi-processor compute node, the existing Parallel File Systems are not capable of providing more than a very small percentage of the total I/O Bandwidth to an individual compute client. A more efficient use of the Large Shared Memory Compute System, 112 in FIG. 2, would be had if there were a way for all of the Parallel File Systems aggregate I/O to be available for the compute client or clients within the Large Shared Memory Compute system.
Therefore, there is a need for a solution to improve the “Peak I/O Bandwidth Performance” for a single “File System Client,” 101-1 in FIGS. 1 and 2, in a large “Common Global Shared Memory” Compute System, 112 in FIGS. 1 and 2.


1. Field of the Invention
The present invention relates generally to the field of soybean breeding. In particular, the invention relates to the novel soybean variety 01056961.
2. Description of Related Art
There are numerous steps in the development of any novel, desirable plant germplasm. Plant breeding begins with the analysis and definition of problems and weaknesses of the current germplasm, the establishment of program goals, and the definition of specific breeding objectives. The next step is selection of germplasm that possess the traits to meet the program goals. The goal is to combine in a single variety an improved combination of desirable traits from the parental germplasm. These important traits may include higher seed yield, resistance to diseases and insects, better stems and roots, tolerance to drought and heat, better agronomic quality, resistance to herbicides, and improvements in compositional traits.
Soybean, Glycine max (L.), is a valuable field crop. Thus, a continuing goal of plant breeders is to develop stable, high yielding soybean varieties that are agronomically sound. The reasons for this goal are to maximize the amount of grain produced on the land used and to supply food for both animals and humans. To accomplish this goal, the soybean breeder must select and develop soybean plants that have the traits that result in superior varieties.
The oil extracted from soybeans is widely used in food products, such as margarine, cooking oil, and salad dressings. Soybean oil is composed of saturated, monounsaturated, and polyunsaturated fatty acids, with a typical composition of 11% palmitic, 4% stearic, 25% oleic, 50% linoleic, and 9% linolenic fatty acid content (“Economic Implications of Modified Soybean Traits Summary Report,” Iowa Soybean Promotion Board & American Soybean Association Special Report 92S, May 1990).


A known semiconductor device of this kind is depicted and described, for example, in patent DE 195 06 093 02. A schematic diagram of such a known semiconductor device is provided in FIG. 2. In that case, a microcooler 20 is fabricated by bonding together plural copper foils structured by etching. The individual layers form in conjunction a coolant inlet 24; a cooling channel 26, which conducts the coolant to the region of the microcooler 20 on which a power laser bar 12 is mounted; and a coolant outlet 28. The coolant flows along the arrow 30 from the inlet 24 to the outlet 28. Implemented in at least one region 32 are microstructures: narrow channels, for example. Particularly effective heat exchange takes place in that region because of turbulent flow of the coolant.
The laser bar 12 is soldered to the front edge of the microcooler by means of a soft solder 52—indium, for example. Mounting the bar 12 directly on the copper block 20 improves heat transfer from the laser bar to the cooler.


1. Field of the Invention
This invention relates to a portable, hand-held, device for transferring data to and from a data processing system via a graphical user interface, and, more particularly, to a hand-held data storage device that generates graphical user input signals to facilitate data transfer.
2. Description of the Prior Art
In the prior art, there are a variety of devices and networks to move data from one data processing system (e.g., a personal computer system) to another data processing system. These include diskettes (e.g., magnetic and optical), local area hardwired networks, various wireless transmission networks, and semi-conductor memory cards.
More specifically to this invention, U.S. Pat. No. 4,102,493 issued to Moreno et al. (Moreno '493) describes a method and apparatus for transporting data from one device to another. In Moreno '493, data is transferred from a processor system to a portable card in which data is electronically stored, modified, and transferred to another processor system. Moreno '493 transports data by means of a hand-held device, but the device does not provide a user interface to facilitate the transfer (upload or download) of the data.
U.S. Pat. No. 4,125,871, issued Nov. 14, 1987, to Martin et al. (Martin '871) describes a portable data entry device in which a user keys in data, which is stored in the device until a later time when the data is uploaded to a computer system. The portable data entry device is wholly contained within a small housing. The device includes an electronic memory capable of storing a plurality of multiple character records and includes manually operable controls for sequencing through the memory for review and updating of previously entered data. A connector is provided on the housing by which the device can be directly connected to a data system for the readout of the stored data. The device is self powered and contains circuitry operative to conserve available energizing power.
U.S. Pat. No. 4,689,757, issued to Downing et al. (Downing '757), describes an apparatus for transporting information captured at a coin counter to a computer. The system is comprised of a discrete machine event counting module which records and stores a count of machine operation and can include means for recording the time of some selected event or events. The module also stores an identification code for the particular machine. The module can be connected directly through a microprocessor to a central processing center, or it can be located at a machine or at a group of machines.
The transfer unit can then be transported to access means for the central processing center and the information that was obtained from the module will be transferred to centers for processing and tabulation.
Of course, graphical user interfaces which allow a user to generate computer commands by means of a graphical icon display and display pointer are well known and widely used in the art (see, for example, U.S. Pat. No. 5,204,947 and the materials referenced therein). Notwithstanding, in the prior art there is no generally applicable, simple way to transfer data among diverse systems.


1. Field of the Invention
The present invention relates to light-emitting modules for light communication, and in particular to a light-emitting module which is preferably used as a pig tail type in which an optical fiber is fixed.
2. Description of the Related Art
In a pig tail type of light-emitting module in which a laser diode, a lens and an optical fiber are incorporated, a laser beam emitted from the laser diode is converged by the lens and the laser beam converged by the lens and then optically coupled with the optical fiber. Such optical coupling requires not only essential accurate alignment in directions (X- and Y-directions) perpendicular to the optical direction of the laser beam in the optical fiber, but also accurate alignment in the direction (Z-direction) of the optical axis due to variations in the position of the laser diode chip when the chip is manufactured. Therefore, conventionally, the laser diode and the lens are aligned at first so as to be incorporated, and subsequently, the three components being the laser diode, the lens and the optical fiber are incorporated by adjusting the optical fiber in the X-, Y- and Z-directions.
However, according to the above conventional light-emitting module, the optical fiber must be tri-axially adjusted in the X-, Y- and Z-directions, which requires not only a complicated adjusting mechanism but also considerable time for adjustment. This greatly increases manufacturing cost. In general, a laser diode with a cap has various chip position shifts of approximately .+-.60 .mu.m in the X-, Y- and Z-directions, thus, if adjustment in the Z-direction is omitted, coupling efficiency greatly deteriorates, which disadvantageously causes deterioration in performance of the light-emitting module.


1. Field of the Invention
The present invention concerns the fields of cancer diagnostics and targeted delivery of therapeutic agents to cancer cells. More specifically, the present invention relates to compositions and methods for identification and use of peptides that selectively target cancer cell receptors, such as the IL-11 receptor and/or the GRP78 receptor. In particular embodiments, the targeted receptors are preferentially expressed in prostate cancer, especially in metastatic prostate cancer. In certain embodiments, the invention concerns compositions and methods of use of novel phage-based gene delivery vectors.
2. Description of Related Art
Therapeutic treatment of many disease states is limited by the systemic toxicity of the therapeutic agents used. Cancer therapeutic agents in particular exhibit a very low therapeutic index, with rapidly growing normal tissues such as skin and bone marrow affected at concentrations of agent that are not much higher than the concentrations used to kill tumor cells. Treatment of cancer and other organ, tissue or cell type confined disease states would be greatly facilitated by the development of compositions and methods for targeted delivery to a desired organ, tissue or cell type of a therapeutic agent.
Recently, an in vivo selection system was developed using phage display libraries to identify targeting peptides for various organs, tissues or cell types in a mouse model system. Phage display libraries expressing transgenic peptides on the surface of bacteriophage were initially developed to map epitope binding sites of immunoglobulins (Smith and Scott, 1986, 1993). Such libraries can be generated by inserting random oligonucleotides into cDNAs encoding a phage surface protein, generating collections of phage particles displaying unique peptides in as many as 109 permutations. (Pasqualini and Ruoslahti, 1996, Arap et al, 1998a; Arap et al 1998b).
Intravenous administration of phage display libraries to mice was followed by the recovery of phage from individual organs (Pasqualini and Ruoslahti, 1996). Phage were recovered that were capable of selective homing to the vascular beds of different mouse organs, tissues or cell types, based on the specific targeting peptide sequences expressed on the outer surface of the phage (Pasqualini and Ruoslahti, 1996). A variety of organ and tumor-homing peptides have been identified by this method (Rajotte et al., 1998, 1999; Koivunen et al., 1999a; Burg et al., 1999; Pasqualini, 1999). Each of those targeting peptides bound to different receptors that were selectively expressed on the vasculature of the mouse target tissue (Pasqualini, 1999; Pasqualini et al., 2000; Folkman, 1995; Folkman 1997). Tumor-homing peptides bound to receptors that were upregulated in the tumor angiogenic vasculature of mice (Brooks et al., 1994b; Pasqualini et al., 2000). In addition to identifying individual targeting peptides selective for an organ, tissue or cell type (Pasqualini and Ruoslahti, 1996; Arap et al, 1998a; Koivunen et al., 1999b), this system has been used to identify endothelial cell surface markers that are expressed in mice in vivo (Rajotte and Ruoslahti, 1999).
This relative success notwithstanding, cell surface selection of phage libraries has been plagued by technical difficulties. A high number of non-binder and non-specific binder clones are recovered using previous in vivo methods, particularly with components of the reticuloendothelial system such as spleen and liver. Removal of this background phage binding by repeated washes is both labor-intensive and inefficient. Cells and potential ligands are frequently lost during the many washing steps required. Methods that have been successful with animal model systems are unsatisfactory for identifying human targeting peptides, which may differ from those obtained in mouse or other animal model systems.
Attachment of therapeutic agents to targeting peptides has resulted in the selective delivery of the agent to a desired organ, tissue or cell type in the mouse model system. Targeted delivery of chemotherapeutic agents and proapoptotic peptides to receptors located in tumor angiogenic vasculature resulted in a marked increase in therapeutic efficacy and a decrease in systemic toxicity in tumor-bearing mouse models (Arap et al., 1998a, 1998b; Ellerby et al., 1999). However, the targeted delivery of anti-cancer agents in humans has not yet been demonstrated. The targeted receptors reported in previous studies may be present in angiogenic normal tissues as well as in tumor tissues and may or may not be of use in distinguishing between normal tissues, non-metastatic cancers and metastatic cancer. A need exists for tumor targeting peptides that are selective against human cancers, as well as for targeting peptides that can distinguish between metastatic and non-metastatic human cancers.
Attempts have been made to target delivery of gene therapy vectors to specific organs, tissues or cell types in vivo. Directing such vectors to the site of interest would enhance therapeutic effects and diminish adverse systemic immunologic responses. Adenovirus type 5 (Ad5)-based vectors have been commonly used for gene transfer studies (Weitzman et al., 1997; Zhang, 1999). The attachment of Ad5 to the target cell is mediated by the capsid's fiber knob region, which interacts with cell surface receptors, including the coxsackie adenovirus receptor (CAR) and possibly with MHC class I (Bergelson et al., 1997; Hong et al., 1997). Upon systemic administration in vivo, binding of virus to CAR can result in unintended enrichment of vectors in non-targeted but CAR-expressing tissues. Conversely, target cells that express little or no CAR are inefficiently transduced. A need exists to develop novel gene therapy vectors to allow more selective delivery of gene therapy agents.
A need also exists to identify receptor-ligand pairs in organs, tissues or cell types. Previous attempts to identify targeted receptors and ligands binding to receptors have largely targeted a single ligand at a time for investigation. Identification of previously unknown receptors and previously uncharacterized ligands has been a very slow and laborious process. Such novel receptors and ligands may provide the basis for new therapies for a variety of disease states, such as cancer and/or metastatic prostate cancer.


The present invention relates to a pressure jet cleaning appliance with a pressure pump driven by a driving means from whose pressure pipe a bypass pipe, which, when the pressure pipe is closed, is opened by means of a closing valve provided with a closing element, leads to the suction pipe of the pressure pump and having a control element that is connected to a governor of the driving means.
In non-stationary operating pressure jet cleaning appliances, an electromotor or an internal combustion engine is frequently employed as driving means of the pressure pump that is operated at a constant rotational speed. In the case of the electromotor, the rotational speed control is effected independently of the load by means of the fixed number of poles and the constant mains frequence and, in the case of the internal combustion engine, by means of a rotational speed-dependent throttle valve position. In such a case the control of the system is effected in that, with the opened spray gun, the driving means drives the pressure pump with the power that is necessary for the operation of the pressure jet cleaning appliance. When the spray gun is then closed with the aid of the normally provided control handle, a bypass closing valve enters into action in such a way that, when the pressure pipe is closed by the spray gun, a bypass pipe to the suction pipe opens so that the pressure pump then delivers the cleaning fluid into the circulation. The power of the pressure pump that is necessary in this bypass operation is considerably less than the power required in the normal spraying, squirting or cleaning operation.
In order to reduce the noise development and the wear during the operating intervals (bypass operation), a control is expediently effected in that, when the pressure pipe is closed, the driving means is regulated down to a rotational speed that is lower than the nominal operating speed.
For this, in a known high-pressure jet cleaning appliance, a pressure sensor is provided in the pressure pipe which detects the pressures which occur inside the pressure pipe, in particular the lowering of the pressure which occurs after the closing of the pressure pipe and the opening of the bypass valve connected therewith, and the increase in the fluid pressure which occurs in the pressure pipe following the reopening of the pressure pipe and reduces the rotational speed of an internal combustion engine provided as driving means as soon as the pressure in the pressure pipe, due to the opening of the bypass valve, drops below a certain value and, when a certain pressure value is exceeded, once more adjusts the throttle control rod of the internal combustion engine to an increase in the rotational speed (DE 39 02 252 C1).
However, this method of regulation is subject to various disadvantages. For it has to be stated that such a control system operates according to quite specific pressure changes which arise in the pressure pipe under quite specific directions subsequent to the opening or closing of the bypass valve, said changes being then utilized for the control. This means that the control is merely able to lag timewise behind the pressure conditions occurring, that is to say, the control becomes only effective when a rise in pressure or a drop in the pressure has taken place.
Furthermore, in pressure jet cleaning appliances there arises the problem that an operation of the pressure jet cleaner is only possible at one pressure, viz. the maximum pressure, independently of the circumstance whether this pressure is actually required. That is why it is desirable to adapt the pressure of the squirted-out cleaning medium as well as the driving power needed herefor to the case of application. With the DE 39 22 956 A1, a high-pressure jet cleaning device has already been proposed which comprises a high-pressure pump, a pressure pipe leading from the latter to a closable outlet, a bypass pipe leading from the same to the induction side of the pump and a closing valve that closes the bypass pipe. The device makes an automatic pressure discontinuation of the pump possible when closing the outlet, is constructed in such a way that, upstream of the outlet and downstream of the branching of the bypass pipe, a flow controller is provided which closes the closing valve of the bypass pipe when the outlet is closed. In this case the closing valve is constructed in the form of a closing valve and provision has been made for an adjustable stop, with the aid of which the closing motion of the closing valve can be limited. However, with such a set-up, only the volume flow is regulated.
This invention is based upon the technical problem of constructing, in a pressure jet cleaning appliance of the type stated in the beginning, a control in such a way that the same is independent of pressure changes that occur due to the closing or opening of the closing valve and, more particularly, prior to the occurrence of these pressure changes, adjusts the rotational speed of the driving means.


1. Field of the Invention
The present invention relates to a level gauge for detecting a level of liquid helium which is accommodated in a container made of metals, glasses or other materials. More particularly, the invention relates to a level gauge for detecting a level of liquid helium which uses, as a sensing element, a wire made of an amorphous superconductive alloy obtained by rapid by quenching a molten alloy. The level of liquid helium is detected by measuring an electric current, voltage and/or electric resistance of the sensor element.
2. Description of Related Technology
Liquid helium level gauges that use superconducting alloy sensing elements rely on the electrical resistance changes of the element to indicate liquid level. The portion of the element submerged in the liquid becomes superconductive, i.e. no resistance to electrical current. The portion above the liquid is not superconductive and resists electrical flow at a constant rate over its length. If the sensing element is homogeneous, has a constant width, and has a constant thickness, the resistance properties will be constant over the length of the sensor element. By passing an electrical current through the submerged element, measuring the electrical current, and comparing the value to a calibration relationship, the level of the helium can be determined.
In the level gauge disclosed in U.S. Pat. No. 4,655,079 (which is herein incorporated by reference), the superconductive alloy is represented by the following formula: EQU Zr.sub.100-x (Ru.sub.y Rh.sub.1-y)x
wherein x represents the contents of Ru and/or Rh in aomic % and has a numeral value of 22.5<x<27.5; and y represents a numerical value of 0<y<1.
However, the superconducting transition temperature (Tc) of that superconductive alloy ranges from 4.2K to 4.5K. This transition temperature is quite close to the temperature of liquid helium (4.2K). As the pressure in the storage vessel changes, the accuracy of the level measurements can decrease.


A known semiconductor light emitting apparatus can include a substrate, a frame body mounted on the substrate, the frame body having a light-shielding property and a reflective property, a semiconductor light emitting element mounted on the substrate that is exposed within the frame body, and a light-transmitting resin filled inside the frame body to resin-seal the semiconductor light emitting element. This type of conventional semiconductor light emitting apparatus can be manufactured by the method shown in FIGS. 1A to 1E, for example, including:
Step (a): fabricating a multi-piece substrate 101 on which a plurality of semiconductor light emitting elements 100 are mounted at predetermined intervals (FIG. 1A);
Step (b): performing primary transfer molding using a light transmitting resin to form a light transmitting portion 102 with a predetermined thickness on the mounted substrate 101 (thereby resin-sealing semiconductor light emitting elements shown in FIG. 1B);
Step (c): cutting the light transmitting portion 102 using a dicer to form grooves 13 at predetermined intervals in the longitudinal and transverse directions with a predetermined depth and a predetermined width (FIG. 1C);
Step (d): performing secondary transfer molding using a resin having a light-shielding property and a reflective property to form frame bodies 104 within the grooves (FIG. 1D);
Step (e): cutting the product along the frame bodies 104 using a dicer to separate individual substrates 101 having the respective semiconductor light emitting elements mounted thereon together with the respective frame bodies 104 (FIG. 1E).
Through the above steps (a) through (e), a plurality of semiconductor light emitting elements 105 having the appearance shown in FIG. 1F can be simultaneously completed (for example, Japanese Patent Application Laid-Open Nos. 2002-344030 and 2003-31854).
Another method has been proposed as follows (for example, see Japanese Patent Application Laid-Open No. 2006-324623). First, a frame body is formed by performing primary transfer molding. Then, the product is released from the mold, and a light emitting body is disposed within the frame body. The resulting product is again set in the mold to perform secondary transfer molding so that a space within the frame body is filled with a light-transmitting resin for resin-sealing.


The steel for machine structural use such as a gear, shaft, pulley, constant velocity joint and the like utilized for a variety of gear transmission devices, to begin with a transmission for an automobile and a differential gear, as well as a crank shaft, con'rod and the like, is generally finished into a final shape by performing the work of forging and the like and thereafter performing cutting work. Because the cost required for the cutting work occupies a major portion in the manufacturing cost, steel material constituting the steel for machine structural use is required to be excellent in machinability. Therefore, technologies for improving machinability have been disclosed from the past.
The typical examples of such technologies are to add Pb and to form MnS by adding S. However, because Pb is hazardous for a human body, its use has come to be restricted. Also, with respect to the parts in which deterioration of the mechanical property caused by sulfide becomes a problem, there is a limit in using S. Further, in cutting work of a gear and the like particularly, gear cutting with a hob is generally performed, however, the cutting in this case differs from the continuous cutting such as what is called lathe turning but is in a manner called as the intermittent cutting. At present, steel material improving the machinability in hobbing has been scarcely materialized. The tool raw material used for a hob is a high-speed steel, and is generally performed with coating of TiAlN and the like. In this case, it is known that the tool surface wears while being oxidized by repeating cutting and idle rotation in working under a comparative low speed.
As a method for improving the intermittent cutting machinability, in the patent document 1, steel material is described which is excellent in the intermittent cutting machinability (tool life) under a high speed (cutting speed: 200 m/min or more) by containing Al: 0.04-0.20% and O: 0.0030% or less.
In the patent document 2, a steel for machine structural use is described which contains C: 0.05-1.2%, Si: 0.03-2%, Mn: 0.2-1.8%, P: 0.03% or less, S: 0.03% or less, Cr: 0.1-3%, Al: 0.06-0.5%, N: 0.004-0.025%, O: 0.003% or less respectively, contains Ca: 0.0005-0.02% and Mg: 0.0001-0.005% with solid solution N: 0.002% or more in steel, the remainder being iron and unavoidable impurities, and satisfies
(0.1×[Cr]+[Al])/[O]≦150.
Also, in the patent document 3, a steel for machine structural use is described which contains C: 0.1-0.85%, Si: 0.01-1.0%, Mn: 0.05-2.0%, P: 0.005-0.2%, total Al: exceeding 0.1% and 0.3% or less, total N: 0.0035-0.020%, with solid solution N being limited to 0.0020% or less.


Adiponitrile (ADN) is a commercially important and versatile intermediate in the industrial production of nylon polyamides useful in forming films, fibers, and molded articles. ADN may be produced by hydrocyanation of 1,3-butadiene (BD) in the presence of transition metal complexes comprising various phosphorus-containing ligands. For example, catalysts comprising zero-valent nickel and monodentate phosphorus-containing ligands are well documented in the prior art; see, for example, U.S. Pat. Nos. 3,496,215; 3,631,191; 3,655,723 and 3,766,237; and Tolman, C. A., McKinney, R. J., Seidel, W. C., Druliner, J. D., and Stevens, W. R., Advances in Catalysis, 1985, Vol. 33, pages 1-46. Improvements in the hydrocyanation of ethylenically unsaturated compounds with catalysts comprising zero-valent nickel and certain multidentate phosphite ligands are also disclosed; e.g., see: U.S. Pat. Nos. 5,512,696; 5,821,378; 5,959,135; 5,981,772; 6,020,516; 6,127,567; and 6,812,352.
3-Pentenenitrile (3PN) may be formed through a series of reactions as illustrated below.

According to abbreviations used herein, BD is 1,3-butadiene, HC≡N is hydrogen cyanide, and 2M3BN is 2-methyl-3-butenenitrile. A method to increase the chemical yield of 3PN from BD hydrocyanation includes the catalytic isomerization of 2M3BN to 3PN (Equation 2 above) in the presence of NiL4 complexes as disclosed in U.S. Pat. No. 3,536,748. Co-products of BD hydrocyanation and 2M3BN isomerization may include 4-pentenenitrile (4PN), 2-pentenenitrile (2PN), 2-methyl-2-butenenitrile (2M2BN), and 2-methylglutaronitrile (MGN).
In the presence of transition metal complexes comprising various phosphorus-containing ligands, dinitriles such as ADN, MGN, and ethylsuccinonitrile (ESN) may be formed by the hydrocyanation of 3PN and 2M3BN, as illustrated in Equations 3 and 4 below. Equation 4 also shows that 2M2BN can be formed when 2M3BN undesirably isomerizes in the presence of a Lewis acid promoter that may be carried over from a pentenenitrile hydrocyanation reaction zone.

The hydrocyanation of activated olefins such as conjugated olefins (e.g., 1,3-butadiene) can proceed at useful rates without the use of a Lewis acid promoter. However, the hydrocyanation of un-activated olefins, such as 3PN, require at least one Lewis acid promoter to obtain industrially useful rates and yields for the production of linear nitriles, such as ADN. For example, U.S. Pat. Nos. 3,496,217, 4,874,884, and 5,688,986 disclose the use of Lewis acid promoters for the hydrocyanation of non-conjugated ethylenically unsaturated compounds with nickel catalysts comprising phosphorous-containing ligands.
An integrated process for the production of ADN from BD and HC≡N can comprise BD hydrocyanation, 2M3BN isomerization to produce 3PN, and the hydrocyanation of pentenenitriles, including 3PN, to produce ADN and other dinitriles. Integrated processes are disclosed, for example, in United States Patent Application 2009/0099386 A1.
Disclosed in United States Patent Publication No. 2007/0260086, is a process for the preparation of dinitriles with an aim to provide for the recovery of a catalyst formed by a mixture of mono- and bidentate ligands and to be able to reuse the catalyst thus recovered in the hydrocyanation and/or isomerization stages.
United States Patent Publication No. 2008/0221351 discloses an integrated process for preparing ADN. A first process step includes hydrocyanating BD to produce 3PN over at least one zero-valent nickel catalyst. A second process step of the integrated process involves hydrocyanating 3PN to produce ADN over at least one zero-valent nickel catalyst and at least one Lewis acid. In this integrated process, at least one of the zero-valent nickel catalysts used in one of the process steps is transferred into the other process step.
Phenolic compounds, such as phenol and cresols, may be present as a catalyst impurity in catalysts used to react BD with HCN or to isomerize 2M3BN. Phenolic compounds may be produced by hydrolysis of phosphorus-conating ligands. Phenolic compounds may react with catalysts used to react 3PN with HCN. Such reactions of phenolic compounds with catalysts may reduce the catalytic activity of the catalysts.


1. Field of the Invention
The present invention relates to compact antenna apparatuses such as those used for portable radio terminals.
2. Discussion of the Background
In recent years, it has been important for portable radio terminals to be compact and thin for improved portability. As portable radio terminals have been made compact, however, the effectiveness of the antenna used therein may deteriorate. This tendency becomes especially prominent with a built-in antenna such as an inverted F antenna.
FIG. 11 shows a conventional compact antenna apparatus in which a line-shaped inverted F antenna is disposed on a conductor plate. A line-shaped inverted F antenna 1101 is connected to a conductor plate 1102 by a short-circuited line 1103 and a power-feed line 1104. A portable radio terminals having an operational frequency of 800 MHz is used as an example. The radio terminals, is shown simply by a conductor plate. The longitudinal length L of the conductor plate 1102 is set to one fourth the wavelength of a signal having the specified operational frequency, in the example, one fourth of the wavelength of an 800 MHz signal.
FIG. 12 is a graph showing the radiation efficiency of the line-shaped inverted F antenna 1101 shown in FIG. 11. The horizontal axis indicates the longitudinal length L of the conductor plate 1102 shown in FIG. 11. It is understood from this graph that the efficiency becomes -3 dB or less when the longitudinal length of the conductor plate becomes one fourth the wavelength or less. This indicates that about half the power supplied to the antenna 1101 is lost in the antenna 1101. This deterioration may occur in a compact antenna such as a line-shaped inverted F antenna as a result of the compact conductor plate.
As described above, as a portable radio terminals have been made compact, antenna performance may deteriorate. Especially with a compact antenna apparatus such as an inverted F antenna mounted on a conductor plate having a length of about one fourth the wavelength, the degree of deterioration is high and stable communication may be impeded.


Industrial control systems, like those used in the oil and gas production industry, frequently include one or more remote terminal units (RTUs) and/or flow computers as key components in an operating process unit of a control system (e.g., at a wellhead oil production site). RTUs are used to interface a control system host with field devices (e.g., valves, valve positioners, switches, sensors, transmitters, etc.) configured to perform control functions such as opening or closing valves and measuring process parameters. RTUs enable this interface by communicating commands from the host to the field devices and by communicating data sent by the field devices back to the host. Such communications may be implemented via any of analog, digital, or combined analog/digital buses using any desired communication media (e.g., hardwired, wireless, etc.) and protocols (e.g., Fieldbus, Profibus®, HART®, etc.). Additionally or alternatively, RTUs may act as standalone devices that implement process control and data archiving independent of commands provided by the host (and/or without connection to the host).


Examples of communication terminals include smartphones, portable phones, and tablet terminals. In recent years, the communication terminal enables executing applications in addition to perform a communication.
Examples of applications executed using the communication terminal include an application called a “native application”. The native application is executed by an Operating System (OS) of a communication terminal. Hence, the native application has a high dependence on the communication terminal.
Examples of applications executed using a communication terminal also include an application called a “Web application”. The Web application is executed by a browser of a communication terminal. Hence, the Web application has a low dependence on the OS.
Examples of the Web applications include a Hyper Text Markup Language (HTML) 5 application. The HTML5 application conforms to the HTML5 standard advocated by the World Wide Web Consortium (W3C).
The HTML5 uses an origin. According to the standard advocated by the W3C, the origin includes a protocol, a domain (host), and a port number. As a technology related to the origin, a technology has been proposed wherein access control for each part in an HTML document constituting a Web page is performed according to the origin of the part in the document (see, for example, patent document 1).
Patent document 1: Japanese Laid-open Patent Publication No. 2008-299414


Recently the use of enzymes, especially of microbial origin, has become more and more common. Enzymes are used in several industries including, for example, the starch industry, the dairy industry, and the detergent industry. It is well known in the detergent industry that the use of enzymes, particularly proteolytic enzymes, has created industrial hygiene concerns for detergent factory workers, particularly due to the health risks associated with dustiness of the available enzymes.
Since the introduction of enzymes into the detergent business, many developments in the granulation and coating of enzymes have been offered by the industry. See for example the following patents relating to enzyme granulation:
U.S. Pat. No. 4,106,991 describes an improved formation of enzyme granules by including within the composition undergoing granulation, finely divided cellulose fibers in an amount of 2-40% w/w based on the dry weight of the whole composition. In addition, this patent describes that waxy substances can be used to coat the particles of the granulate.
U.S. Pat. No. 4,689,297 describes enzyme containing particles which comprise a particulate, water dispersible core which is 150-2,000 microns in its longest dimension, a uniform layer of enzyme around the core particle which amounts to 10%-35% by weight of the weight of the core particle, and a layer of macro-molecular, film-forming, water soluble or dispersible coating agent uniformly surrounding the enzyme layer wherein the combination of enzyme and coating agent is from 25-55% of the weight of the core particle. The core material described in this patent includes clay, a sugar crystal enclosed in layers of corn starch which is coated with a layer of dextrin, agglomerated potato starch, particulate salt, agglomerated trisodium citrate, pan crystallized NaCl flakes, bentonite granules or prills, granules containing bentonite, Kaolin and diatomaceous earth or sodium citrate crystals. The film forming material may be a fatty acid ester, an alkoxylated alcohol, a polyvinyl alcohol or an ethoxylated alkylphenol.
U.S. Pat. No. 4,740,469 describes an enzyme granular composition consisting essentially of from 1-35% by weight of an enzyme and from 0.5-30% by weight of a synthetic fibrous material having an average length of from 100-500 micron and a fineness in the range of from 0.05-0.7 denier, with the balance being an extender or filler. The granular composition may further comprise a molten waxy material, such as polyethylene glycol, and optionally a colorant such as titanium dioxide.
U.S. Pat. No. 5,254,283 describes a particulate material which has been coated with a continuous layer of a non-water soluble, warp size polymer. U.S. Pat. No. 5,324,649 describes enzyme-containing granules having a core, an enzyme layer and an outer coating layer. The enzyme layer and, optionally, the core and outer coating layer contain a vinyl polymer.
WO 91/09941 describes an enzyme containing preparation whereby at least 50% of the enzymatic activity is present in the preparation as enzyme crystals. The preparation can be either a slurry or a granulate.
WO 97/12958 discloses a microgranular enzyme composition. The granules are made by fluid-bed agglomeration which results in granules with numerous carrier or seed particles coated with enzyme and bound together by a binder.
However, even in light of these developments offered by the industry (as described above) there is a continuing need for low-dust granules. In particular, it is especially problematic in the detergent industry when granules in general, or those comprising proteins or enzymes, form dust and are aerosolized. In these cases, workers are often exposed to the contents of the granules and can develop severe allergic reactions. Therefore, it is an object of the present invention to provide a method of producing a low-dust enzyme granule by adding antifoam agent. It is a further object of the invention to facilitate a safer environment for workers in the detergent industry who are exposed to enzyme containing granules.


Integrated Circuit (IC) packages, chips (sometimes called die), and other devices have evolved into very dense packaged structures. Semiconductor miniaturization has resulted in the development of very large scale integrated circuit (VLSI) devices with millions of active and passive components. These devices are typically encapsulated in a protective package providing a large number of pin-outs for mounting or interconnection to external circuitry through a carrier substrate such as a printed circuit board or other higher-level packaging.
The semiconductor industry is well over 60 billion dollars a year market. Improved fabrication technologies have lowered cost while increasing functional power thereby revolutionizing the electronic marketplace. The ability to put more and more functionality and higher performance is generally made possible by repeatedly shrinking feature sizes. However, as the more and more functionality and performance characteristics are included in these chips, the limits of current technologies and methodologies are approached. There are a number of issues and trends that are becoming readily apparent. For example, package temperature issues are exacerbated by a number of factors including static power and lowered junction temperatures due to smaller feature sizes and lowered thresholds. Also, hot spots within the chips are exacerbated by the active elements being buried so deeply beneath the conducting layers and contacts.
In the formation of integrated circuits, a number of active and passive semiconductor devices are formed on each of many die on a wafer, such as silicon. The fabrication technology for integrated circuits has vastly improved yields such that large arrays of electronic circuits on many die are produced on a single semiconductor wafer. In a typical die, two or more silicide layers and up to eight metallization layers, each separated by a dielectric layer, are currently used to interconnect among the active and passive elements to form the individual circuits and to interconnect among those circuits to form the die. They are also used to provide bonding pads at the top of the die. For example, Texas Instruments has a 65 nm process that uses eleven (11) copper conducting layers plus two polysilicide layers for a total of twenty-seven (27) conducting and dielectric layers.
Typical interface schemes for integrated circuit packaging include Pin Grid Array (PGA), Ball Grid Array (BGA), and Land Grid Array (LGA). PGA packages use a two-dimensional array of pins directly connected by soldering or inserted into through-hole pads in a Printed Circuit Board (PCB). BGA packages have a two-dimensional array of conductive pads, such as balls, bumps or pillars, and are mounted by soldering the pads on the package to corresponding surface pads on the mount side of the PCB. LGA packages have an array of metal stubs and are mounted to the PCB in a clamp with a compressible interposer material placed between the package and the PCB.
For illustrative purposes, the description herein will focus somewhat on the most common package, the BGA. The BGA bond pads of the semiconductor die are sometimes connected to the printed circuit board via conductors, either by direct contact in a flip-chip orientation through conductive balls, bumps or pillars or, by intermediate connector elements comprising wire bonds, or TAB (flexible circuit) connections. More commonly they are connected inside a package which in turn is soldered to the PCB. In addition, as ball sizes shrink, they are less tolerant of the already worsening planarity problems.
One of the well-known problems with having the connection balls on the active surface of the die is the planarity required of the die. The problem is compounded as the number of mask levels increase to accommodate the latest demand for processors and memory. The further layers exacerbate the planarity problem and make the die connection more difficult. Another problem associated with the dense packaging is that the fanin/fanout of a given ball is limited to either a single fanin or a single fanout. One of many deleterious effects of this property is that only one element can be placed on a bus unless another delay stage is introduced. Typically, many three state elements are “hung” on a bus, and only one such element is active at any one time. The third state, the high impedance state, of the inactive elements ensures that they neither charge nor discharge the bus.
With respect to the formation of BGA structures, these structures typically require the die to be flipped upside down hence the name “flip chip”. A problem with flipping the chip upside down is that all possibilities of monitoring chip behavior in-situ are eliminated. Integrated circuit (IC) dies typically connect to the substrate within the IC package using either wire bond or Flip-Chip technology. Flip-Chip bonding is normally used for high pin count IC dies, and the pins on the Flip-Chip die are called bump pads. As with the package array technologies, there is a matching pattern of pads on the package substrate. Interconnect on the package substrate is typically used to connect the pads on the substrate (connected directly to the IC die) to the pins, pads, or stubs on the surface of the package that gets inserted, soldered, or pressed to the PCB.
A further problem with using the current flip chip techniques arises from a combination of bringing the interconnects to the top of the die in combination with the large number of layers. The connection to/from the underlying layers must be brought to the top of the die for connection to a connection ball. Current chips have six to eight metallization layers plus two polysilicon layers, and each of these conducting layers is separated from adjacent conducting layers by a dielectric layer. Thus, a signal on the lowest conducting layer may have to go through as many as nine conducting layers and ten dielectric layers, including one on the top surface, in order to reach the top surface and be connected to an interconnect ball.
In order to traverse from each conduction layer through the intervening dielectric layer to connect to an adjacent conduction layer generally requires a stepped via to minimize and avoid step coverage problems. A stepped via is a hole whose cross-section is larger on one end than on the other. It has a contact on both conducting layers, and a short piece of interconnect to route to a via to go to the next upper or lower conduction layer. This process is repeated for each such signal line for each conducting layer until the top is reached. Both the vias and the contacts are considerably larger than the width of the line; thus a considerable area is utilized just for the interconnects to the balls on the top surface of the chip.
It is well-known that as the capacity and speed of many integrated circuit devices, such as dynamic random access memories (DRAMs) have increased, the number of inputs and outputs (I/Os) to/from each die has increased, requiring more numerous and complex external connections thereto and, in some instances, requiring undesirably long traces to place the bond pads serving as I/Os for the typical die in communication with the traces of the carrier substrate.
A related problem with the current techniques is the interconnectivity between dies. Signals that travel to other dies must traverse not just upwards in one die, but may also travel further upwards if the second die is on top of the first die. The signals may also traverse downward into a second die to reach the desired point on a given conduction layer in the second die. Thus, for example, the signal may traverse upwards through many conduction and dielectric layers to reach the top die surface and go through a ball, a bonding pad, or other connection structure on the first die. After a connection to a second die, the signal would then be similarly routed downwards from the top surface of the second die to the desired layer in the second die. Thus, for example, a given signal could traverse about thirty-eight (fifty-four in the case of the 65 nm process of Texas Instruments) conduction and dielectric layers and their associated vias plus two conduction balls, bonding pads, or other connection structure. And, each of the contact layers adds resistance that, in combination with the total length traversed by the signals, may impact signal quality, speed, noise margin, bus skew, slack and setup/hold times, rise and fall times, potential spike generation and signal cancellation and makes timing convergence and other design and verification aspects difficult and sometimes limits upper clock frequencies.
Thus, such a tortured path impacts both speed and signal integrity. It is well known that interconnect delays are often much greater than gate delays below feature sizes of roughly 0.5 to 0.35 micron. Traversing substantial numbers of interconnect layers on two or more die considerably exacerbates the problems of timing convergence, layout, and architecture. Attempts to minimize these problems typically place restrictions on the layers regarding the manner in which signals can travel among these layers. These restrictions increase the already difficult layout and hinder designer creativity. They also sometimes force restrictions on the architecture of the chip.
Long path lengths also add significantly to the capacitance seen by the source and slow the signal down. Moreover, as line widths continually decrease, 22 nanometers currently in development, the number of “squares” and hence the resistance of the line in a given length of line increases by about the same factor as the decrease in line widths. This then increases the resistance seen by the driving source, again by about the same factor as the decrease of the line widths, all else being the same.
Furthermore, the increased line resistance adds to often already strained power usage and dissipation while making it more difficult to make bus signal elements and slave clock signals track their respective functions.
In addition, as higher speed IC assemblies operate at lower operational signal voltages, noise problems also become problematic. Mutual inductance results from an interaction between magnetic fields created by signal currents flowing to and from a packaged IC die through leads or traces, while self inductance results from the interaction of the foregoing fields with magnetic fields created by oppositely-directed currents flowing to and from ground. Signal propagation delays, switching noise, and crosstalk between signal conductors resulting from mutual and self inductance of the conductive paths contribute to signal degradation.
While lead inductance in IC packages has not traditionally been troublesome, the increasing signal frequencies of state-of-the-art electronic systems have substantially increased the practical significance of package lead or trace inductance. For example, at such faster signal frequencies, performance of IC die using extended leads or traces for external electrical connection is slower than desirable because the inductance associated with the elongated conductive paths required slows changes in signal currents through the leads or traces, prolonging signal propagation. In addition, digital signals propagating along the leads or traces are spreading out causing the signal components and signals themselves to disperse. While mild dispersion merely widens the digital signals without detrimental effect, severe dispersion can make the digital signals unrecognizable. In addition, reflection signals propagating along the leads or traces as a result of impedance mismatches between the lead fingers and associated IC die or between the leads or traces and external circuitry, may distort normal signals propagating concurrently with the reflection signals. And, magnetic fields created by signal currents propagating, through the lead or trace-associated inductance can induce currents in adjacent leads or traces, causing crosstalk noise.
Therefore, the state of the art die and package configurations described herein are having difficulties in keeping up with the trend towards faster devices at lower power. Noise problems are exacerbated by use of a large number of laterally adjacent traces of substantial and varying lengths extending from centralized die location to the horizontally-spaced, offset locations of vias extending to solder balls or other conductive elements for securing and electrically connecting the package to a carrier substrate.
There are various constraints that limit the number of signal traces that can be fabricated on a package. Industry standards impose specific requirements as to the spacing between solder balls, thereby restricting the spacing between the vias that electrically connect the signal traces to the solder bumps. The spacing restriction limits the number of signal traces that can fit between the vias which, in turn, limits the number of signal traces that can be used to carry signals to and from the die. Current fabrication technology imposes minimum pitch requirements for signal traces to attain satisfactory yields and to ensure mechanical and electrical reliability. The limitation on the maximum number of usable signal traces limits the maximum number of solder bumps, thereby placing a ceiling on the number of signals that a particular package can provide.
There are several levels of interconnections that make up an encapsulated integrated circuit. First, there are the internal interconnections of the circuit making up an individual die. Then there is the interconnection between the various dies themselves, especially if more than one die is in a package. There is also a connection layer between the dies and the package that allows external access.
With respect to the package connection, wire bonds are typically used to electrically connect the input/output (I/O) pads of the die to traces or pads on the package. If the die is on the side of the circuit board inside the package opposite the solder bumps, conductive vias are formed through the circuit to conduct signals from the solder bumps to the pads or traces. To enable routing in highly dense integrated circuit packages, there are many techniques known to those skilled in the art such as micro-vias, blind vias, buried vias, staggered vias.
A further problem with higher density and more complex circuit design relates to the verification at all the various steps along the process. As the number of layers and the die size increase, the resources to validate the different steps including the design rules of the layouts of the different layers increase exponentially.
In addition, the static power is greater due to leakage through the thin oxides required for the higher density circuits. There is also an increase in the number of conduction and concomitant dielectric layers which must be traversed to reach various parts of a given die and to interact with other dies. This increase gives rise to increased problems with layer to layer registration, step coverage with its potential failure modes, contact integrity, and validation problems. Because of aspect ratios, stepped vias must generally be used in most cases at the smaller feature sizes. However, using the stepped vias adds an additional mask layer for each such stepped via. Planarity also becomes more difficult with the denser circuits.
As noted herein, the existing packaging fail to address several criteria required for high density, high speed and low power packaging, namely: interconnections with non-planar die resulting from many layers on the die; limitations on the fanin/fanout; inability to monitor flip-chip packaging signals; and, very long signal travel paths resulting in signal reflection, degraded signal integrity, propagation delays, switching noise, crosstalk and dispersion. Therefore, what is needed is a mechanically and electrically desirable packaging scheme to accommodate high density high speed, low power packaging. Such a system should interconnect die without having to travel excessive paths and allow in-situ monitoring of critical signals. Ideally the system should be easily implemented without affecting the current and expected fabrication methods and machinery.


Solid gas sorption systems are used to produce cooling and/or heating by repeatedly desorbing and absorbing the gas on a coordinative complex compound formed by absorbing a polar gas refrigerant on a metal salt in a sorption reaction sometimes referred to as chemisorption. Complex compounds incorporating ammonia as the polar gaseous refrigerant are especially advantageous because of their capacity for absorbing large amounts of the refrigerant, often up to 80% of the absorbent dry weight. The complex compounds also exhibit vapor pressure independent of the refrigerant concentration and can be made to absorb and desorb very rapidly. Apparatus using complex compounds to produce cooling are disclosed, for example, in U.S. Pat. Nos. 5,161,389, 5,186,020, and 5,271,239. Improvements in achieving high reaction rates for the complex compounds are achieved by restricting the volumetric expansion of the complex compound formed during the absorption reaction of the gas on the metal salt. The methods and apparatus for achieving such high reaction rates are disclosed in U.S. Pat. Nos. 5,298,231, 5,328,671, 5,384,101 and 5,441,716, the descriptions of which are incorporated herein by reference.
While increased reaction rates have resulted from the aforesaid methods, it has been determined that repeated and relatively long-term absorption and desorption cycling of the complex compounds, particularly those using ammonia as a refrigerant, leads to sorbent migration even in the confined reaction chamber. It has also been found that the sorbent migration increases as higher sorption rates are used. Such migration may lead to uneven sorbent densities which in turn cause force imbalances in the heat exchanger structure, often resulting in deformation of the heat transfer surfaces and/or internal structures. As the heat exchanger structure becomes modified or compromised, heat and mass transfer reductions occur as does the sorption rate of the process. As sorbent migration continues, significant losses in performance efficiency are realized as is the possibility of failure of the reactor especially where it is exposed to high reaction rate sorptions.
Although improvements in attempts to overcome sorbent migration have been made for metal hydrides, such procedures and techniques have not been found to be suitable for ammoniated complex compounds. In U.S. Pat. No. 4,507,263, there is described micro-immobilization for metal hydride using a sintering process in which a metal hydride powder is embedded in a finely divided metal and the mixture sintered in a furnace at 100-200.degree. C. using hydrogen pressure of 250-300 atmospheres. Although such a process reportedly results in mechanical stability for metal hydrides even after 6,000 cycles, the process is not effective for ammoniated complex compounds which exhibit much larger forces as compared to those experienced with metal hydrides. For example, where ammoniated complex compounds are absorbed and/or desorbed above about 3 moles NH.sub.3 /mole sorbent-hr, the forces exercised on a sintered metal structure are so large as to result in deformation of the structure. Moreover, for most practical applications using complex compound technology, practical life expectancy of the reactors will exceed 6,000 cycles by an order of magnitude.


1. Field
Exemplary embodiments of the present invention relate to a nonvolatile memory device and a method for fabricating the same, and more particularly, to a nonvolatile memory device with a three-dimensional structure in which a plurality of memory cells are vertically stacked from a substrate and a method for fabricating the same.
2. Description of the Related Art
A nonvolatile memory device is a memory device which maintains data stored therein even when power supply is interrupted. Currently, various nonvolatile memory devices, for example, a flash memory and the like are widely used.
Recently, as improving the degree of integration of a nonvolatile memory device with a two-dimensional structure in which memory cells are formed in a single layer on a semiconductor substrate reaches a fabrication limit, a nonvolatile memory device with a three-dimensional structure in which a plurality of memory cells are formed along a channel layer vertically projecting from a semiconductor substrate has been suggested in the art. In detail, nonvolatile memory devices with a three-dimensional structure are generally divided into a structure which has a straight channel layer and a structure which has a U-shaped channel layer.
In the case of the conventional structure having the straight channel layer, while manufacturing processes are relatively simple and easy, since a source line is formed by implanting impurities into a silicon substrate, there are concerns in that a doping profile is likely to be changed by a subsequent annealing process and the like and source resistance is likely to increase. Although a method for forming a source line using a conductive substance such as a metal to reduce resistance has been proposed in the art, it may be difficult to control the doping profile of the source region under the channel layer.
In the case of the conventional structure having the U-shaped channel layer, while the above-described concerns may be solved, since the gate electrode of a pass transistor is formed long, channel resistance may increase. According to this fact, concerns are likely to occur in that the threshold voltage of the pass transistor increases and memory cell driving current is reduced.


The present invention relates to a light guide plate and a liquid crystal display (LCD) using the light guide plate.
A liquid crystal display (LCD) is one kind of the most widely used flat panel displays due to its advantages such as compact volume, low power consumption, and no radiation. A LCD is formed by assembling an array substrate and a color filter substrate that are opposite to each other. A gate line and a data line intersect each other and are formed on the array substrate to define a pixel region in which a pixel electrode and a thin film transistor (TFT) as a switching element are disposed. A gate signal is applied over the gate line to a gate electrode of the TFT to turn on/off the TFT, and image data signal is applied to the pixel electrode over the data line. A black matrix is disposed on the color filter substrate to prevent light leakage in areas other than the pixel region. A color filter layer is disposed in each pixel region on the color filter area, and a common electrode is disposed on the color filter substrate. A liquid crystal (LC) layer is filled in a space between the array substrate and the color filter substrate to form a LCD panel. The LCD displays images by applying voltages to the pixel electrode and common electrode to generate an electric field in the LC layer, which determines orientations of LC molecules in the LC layer to change polarization of the incident light.
A backlight module is an important component of a LCD and used for providing the LCD panel with light for display and for determining the color representation quality of the LCD. A conventional LCD backlight module is shown in FIG. 1. The backlight module comprises a light source 1 (for example, a cold cathode fluorescent lamp or light emitting diode), a reflective cover 2 around the light source 1, and a reflection plate 3, a light guide plate 4, a first diffuse plate 5, a first prism plate 6, a second prism plate 7, and a second diffuse plate 8 that are stacked in order. A portion of the light from the light source 1 directly enters the light guide plate 4, and another portion is reflected back by the reflective cover 2 and then enters the light guide plate 4. The light is reflected by the underlying the reflection plate 3 and exits from the upper surface of the light guide plate 4 to transmit through the overlaying optical sheets such as the first and second diffuse plates 5 and 8 and the first and second prism plates 6 and 7 before entering a LCD panel. The light guide plate 4 in the above backlight module serves as an optical medium. The overlaying optical sheets such as the first and second diffuse plates 5 and 8 and the first and second prism plates 6 and 7 are used to uniform the light and enlarge view angle.


This invention relates to a combination of strap and buckle suitable for diving fins.
In the accompanying drawings, FIG. 5 is a perspective view showing one of diving fins 101 disclosed in Japanese Patent Publication No. 1989-38510B as partially broken away and FIG. 6 is a sectional view taken along a line VIxe2x80x94VI in FIG. 5. It should be understood here that, in FIG. 6, the buckle 106 made of hard plastic material is shown in a sectional view and a heel strap 103 made of soft rubber is shown in a side view. This buckle 106 serves to connect the strap 103 to a rear end of a foot pocket 102 and to tighten the strap 103 around a fin wearer""s heel. The buckle 106 comprises a sheath-shaped first coupling member 104 and a second coupling member 105 wherein the first coupling member 104 is mounted on the rear end of the foot pocket 102. The second coupling member 105 has a insert portion 114 releasably attached to the first coupling member 104 and a holding frame mechanism 115 serving to hold the strap 103 draped around a pin 119 provided in the holding frame mechanism 115 as its component. This holding frame mechanism 115 includes movable locking means 120 supported by a shaft 123 and biased by a spring 128 so as to be rotated clockwise as viewed in FIG. 6. The second coupling member 105 is formed on its lower surface with a second locking tooth 124. The strap 103 draped around the pin 119 of the holding frame mechanism 115 is formed on its one surface with a plurality of first locking teeth 121 arranged in longitudinal direction of the strap 103 so that one of these first locking teeth 121 may bear against the second locking tooth 124 in a direction indicated by an arrow 129 in FIG. 6. The second locking tooth 124 is moved off upward from the first locking tooth 121 as the movable locking means 120 is rotated against the biasing effect of the spring 128. Thereupon, the strap 103 may be pulled in the direction indicated by the arrow 129 to move the strap 103 in a direction in which the strap 103 is slackened. Each of the first locking teeth 121 has an inclined rear surface 121A so that the rear surface 121A causes the movable locking means 120 to float as the strap 103 is pulled in the direction opposite to the direction indicated by the arrow 129. In this way, the strap 103 can be moved in the direction in which the strap 103 is tightened.
In the convention combination of buckle 106 and strap 103 as shown in FIGS. 5 and 6, the rectilinear strap 103 is draped around the pin 119 so as to be forcibly flexed in U- or V-shape. The strap 103 normally tends to restore its initial rectilinear state, i.e., tends to move in a direction indicated by an arrow 140 in FIG. 6. Consequently, one of the first locking teeth 121 bears against a rear end 115A of the holding frame mechanism 115 from the right as viewed in FIG. 6 as the strap 103 is pulled in the direction indicated by the arrow 129 and often prevents the strap 103 from smoothly moving in the direction indicated by the arrow 129. Thus, operation of slackening the strap 103 would take much time.
It is an object of this invention to improve the conventional combination of buckle and strap so that the strap can be smoothly moved and slackened without taking much time and labor.
According to this invention, there is provided a combination of buckle and strap for diving fins adapted to couple a heel strap to a foot pocket and at the same time to adjustably tighten the strap around a diver""s heel.
The strap is formed on its one surface a plurality of first locking teeth arranged intermittently in a longitudinal direction of the strap, each of the first locking teeth extending in a transverse direction of the strap so as to leave transversely opposite side edge portions of the strap free from any tooth. The buckle comprises a sheath-shaped first coupling member and a second coupling member releasably engaged with the first coupling member and having front and rear ends, wherein the second coupling member comprises an insert portion formed adjacent the front end so as to be releasably engaged with the first coupling member and a holding frame mechanism formed adjacent the rear end within which the strap is draped around so as to be movable in the longitudinal direction of the strap. The holding frame mechanism includes a movable locking piece pivotally supported by the holding frame mechanism. The movable locking piece has a second locking tooth normally biased by springs to bear against the first locking tooth and thereby to prevent the strap from moving in a direction in which the strap is slackened and pivotally moved upward away from the first locking tooth against the biasing effect of the springs, allowing the strap to move in a direction in which the strap is tightened, as the strap is pulled in the direction in which the strap is tightened. In the vicinity of the rear end, the holding frame mechanism presents an inverted U-shaped section defined by a top portion and a pair of lateral portions depending from transversely opposite side edges of the top portion wherein a pin around which the strap is draped extends between the pair of lateral portions below the top portion and a lower surface of the top portion has transversely opposite side edge portions bears against the strap disposed between the lower surface and the pin so that the transversely opposite side edge portions of the strap extending outside the first locking teeth may slidably move and transversely middle zone of the lower surface of the top portion is hollowed out upward by a dimension deeper than a height of the first locking teeth so that the first locking teeth can move in the longitudinal direction of the strap.


The present invention relates generally to plastic fasteners and more particularly to clips of plastic fasteners.
Plastic fasteners are well known in the art and are commonly used to couple together two or more objects. For example, plastic fasteners have been used to attach merchandise tags to articles of commerce, to couple or to re-couple a button to an article of clothing, to last together shoe uppers, and the like.
Plastic fasteners typically comprise a flexible filament having a first enlargement at one end thereof and a second enlargement at the opposite end thereof. In one common type of plastic fastener (see, for example, FIG. 1 of U.S. Pat. No. 5,321,872, which patent is incorporated herein by reference), the first enlargement has the shape of a transverse bar and the second enlargement has the shape of a paddle or the shape of a second transverse bar, the transverse bar and the paddle (or second transverse bar) extending in planes parallel to one another. In another common type of plastic fastener (see, for example, U.S. Pat. No. 3,494,004, which patent is incorporated by reference), the first enlargement has the shape of a transverse bar and the second enlargement has the shape of a knob or pin head. In still another common type of plastic fastener (see, for example, U.S. Pat. No. 4,240,183, which patent is incorporated herein by reference), the first enlargement has the shape of a transverse bar or the shape of a plug and the second enlargement has the shape of a socket, said socket being adapted to receive said transverse bar or said plug.
Plastic fasteners of the various types described above are typically molded as parts of a unitary fastener clip. An example of such a fastener clip is disclosed in U.S. Pat. No. 3,733,657, which patent is incorporated herein by reference. The clip of the aforementioned '657 patent includes a plurality of fasteners, each of said fasteners comprising a flexible filament having a transverse bar (or "cross-bar") at one end thereof and a paddle or a second transverse bar (or "cross-bar") at the opposite end thereof, the transverse bar and the paddle (or second transverse bar) of each fastener extending in planes parallel to one another. The fasteners are arranged relative to one another so that the respective transverse bars are spaced apart and oriented side-by-side and parallel to one another and so that the respective paddles (or second transverse bars) are spaced apart and oriented side-by-side and parallel to one another. The clip of the foregoing '657 patent also includes a runner bar, said runner bar extending perpendicularly relative to the respective transverse bars and being connected to each of the transverse bars by a severable connector. The clip of said '657 patent further includes a severable member interconnecting each pair of adjacent paddles (or second transverse bars).
Other examples of fastener clips that comprise one or more runner bars interconnecting plastic fasteners include U.S. Pat. Nos. 5,622,257, 4,901,854, 5,799,375, and U.S. Reissue Patent No. 34,891, all of which are incorporated herein by reference.
Fastener clips which comprise a runner bar suffer from certain disadvantages. For example, because the runner bar of a fastener clip is of no use once the fasteners originally attached thereto have been dispensed therefrom, a used runner bar typically constitutes economically and environmentally undesirable waste material. In addition, severed connectors previously used to connect fasteners to a runner bar and still remaining on the runner bar after the fasteners have been detached therefrom often have an acute end which may undesirably snag on and damage merchandise when fasteners from the fastener clip are dispensed into such merchandise with a conventional fastener dispensing tool. Furthermore, the number of fasteners that can be molded into a clip of the type having a runner bar is typically limited by the molding process used to create the fastener clip.
For at least the above reasons, a number of runner bar-less fastener clips, assemblies or stock have been fashioned. For example, in U.S. Pat. No. 4,039,078, inventor Bone, which issued Aug. 2, 1977, and which is incorporated herein by reference, there is disclosed fastener attachment stock to be separated or divided, e.g., by cutting, severing, rupturing or shearing, to provide a plurality of fasteners each preferably having a substantially H shape. The stock in its most preferred form includes two undivided elongated and continuous plastic side members having a plurality of plastic cross links coupled to and between each of said side members, each of the links being preferably spaced equidistantly apart from each other.
Fastener stock related to that disclosed in U.S. Pat. No. 4,039,078 is disclosed in U.S. Pat. No. 4,456,123, inventor Russell, which issued Jun. 26, 1984, and which is incorporated herein by reference. The fastener stock of U.S. Pat. No. 4,456,123 differs from that of U.S. Pat. No. 4,039,078 in that, in U.S. Pat. No. 4,456,123, the filament has a substantially D-shaped cross-section and provides draft on surfaces extending from the plane to facilitate removal from the mold. Also, the side members are reduced in crosssectional area between individual fasteners to provide severable connectors to facilitate separation. The connectors join the end-bars of adjacent fasteners end-to-end at a portion of their periphery, preferably having a flat face at said plane extending from said plane on either the same side as the filaments or the opposite side thereof. Preferably, they extend from the same side and the joined end-bars are substantially D-shaped. Where the connectors extend from the opposite side, the section thereof is preferably continued across the joined end-bars to provide a more rounded cross-section for feeding through circular needle bores.
As can be seen, in each of U.S. Pat. Nos. 4,039,078 and 4,456,123, the enlargements of adjacent fasteners are oriented in an end-to-end relationship. In contrast, in U.S. Pat. No. 4,660,718, inventors Kato et al., which issued Apr. 28, 1987, and which is incorporated herein by reference, there is disclosed a runner bar-less fastener assembly comprising fasteners of the type comprising a flexible filament having a head at one end thereof and a cross-bar at the opposite end thereof, wherein the respective heads and cross-bars of adjacent fasteners are oriented in a parallel, side-by-side, spaced relationship. More specifically, the two side faces of each head are formed so as to protrude or bulge from edges towards a central portion to provide an apex, and adjacent heads are mutually and directly connected through their facing apices in a manner capable of being easily disconnected by cutting. The sides of adjacent cross-bars are connected by a film or a rod that extends longitudinally along a substantial portion of the length of the cross-bars or by a plurality of connectors posts that extend transversely relative to the sides of adjacent cross-bars. As explained in the foregoing '718 patent, the purpose of the aforementioned film, rod and connector posts is to prevent adjacent cross-bars from moving, i.e., pivoting, relative to one another.
In U.S. Reissue Patent 32,332, inventor Kato, which reissued Jan. 20, 1987, there is disclosed a runner bar-less fastener assembly comprising fasteners of the type comprising a flexible filament having a head at one end thereof and a cross-bar at the opposite end thereof, wherein the respective heads and cross-bars of adjacent fasteners are oriented in a parallel, side-by-side, spaced relationship. More specifically, the two side faces of each head are formed so as to protrude or bulge from edges towards a central portion to provide an apex, and adjacent heads are mutually and directly connected through their facing apices in a manner capable of being easily disconnected by cutting. Likewise, the two side faces of each cross-bar are formed so as to protrude at a central portion, and adjacent cross-bars are directly connected through their respective protruding portions in another embodiment, the aforementioned directly-conjoined heads are replaced with a second set of cross-bars that are directly conjoined in the same manner as described above. According to the foregoing '332 patent, the direct conjoining of adjacent heads to one another and the direct conjoining of adjacent cross-bars to one another, both in the manner described above, is preferable to the use of connector posts for the reason that, when severed, connector posts are said to leave unwanted whisker-like projections on the heads and/or cross-bars to which they are attached.


Supply chain planning, which comprises the logistical plan of an in-house supply chain, is essential to the success of many of today's manufacturing firms. Most manufacturing firms rely on supply chain planning in some form to ensure the timely delivery of products in response to customer demands. Typically, supply chain planning is hierarchical in nature, extending from distribution and production planning driven by customer orders, to materials and capacity requirements planning, to shop floor scheduling, manufacturing execution, and deployment of products. Supply chain planning ensures the smooth functioning of different aspects of production, from the ready supply of components to meet production demands to the timely transportation of finished goods from the factory to the customer.
A modern supply chain often encompasses a vast array of data. The planning applications that create and dynamically revise plans in the supply chain in response to changing demands and capacity require rapid access to data concerning the flow of materials through the supply chain. The efficient operation of the supply chain depends upon the ability of the various plans to adjust to changes, and the way in which the required data is stored determines the ease with which it can be accessed.
Operations in a production line of a plant for producing a product are carried out at work centers. In supply chain planning tools work centers are represented by business objects that can e.g. represent the following real work centers: machines or machine groups; production lines; assembly work centers; and employees or groups of employees.
Together with bills of material and routings, business objects representing work centers belong to the master data in production planning and control systems. Business objects representing work centers are used in task list operations and work orders. Task lists are for example routings, maintenance task lists, inspection plans and standard networks. Work orders are created for production, quality assurance, plant maintenance and for the project system as networks.
Data in work centers is used for scheduling, costing, capacity planning, and simplifying operation maintenance. For the purpose of scheduling, operating times and formulas are entered in the business object representing the work center, so that the duration of an operation can be calculated. For the purpose of costing, formulas are entered in the business object representing the work center, so that the costs of the operation can be calculated. Usually a business object representing the work center is also assigned to a cost center.
The available capacity and formulas for calculating capacity requirements are entered into the business object representing a work center for capacity planning. Further, various default values for operations can be entered in the business object representing the work center for simplifying operation maintenance.
A business object representing a work center is created for a plant and is identified by a key. The work center category that can be defined in customising, determines which data can be maintained in the business object representing the work center.
Supply chain planning and management tools as the SAP R/3 system use routing. Routing is a description of which operations, e.g. process steps, have to be carried out and in which order to produce a product. In addition to information about the operations and the order in which they are carried out, routing also contains details about the work centers at which they are carried out as well as about the required production resources and tools. Standard values for the execution of individual operations are also saved in routings. Usually a bill of material (BOM) is assigned to routing. Individual components of the BOM are assigned to the routing operations.