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A D-type flip-flop is a clocked flip-flop which has two stable states. A D-type flip-flop operates with a delay in input by one clock cycle. Thus, by cascading many D-type flip-flops delay circuits can be created, which are used in many applications such as in digital television systems.
A D-type flip-flop is also known as a D flip-flop or delay flip-flop.
A D-type flip-flop consists of four inputs:
It also has two outputs, with one being logically inverse of other. The data input is either logic 0 or 1, meaning low or high voltage. The clock input helps in synchronizing the circuit to an external signal. The set input and reset input are mostly held low. A D-type flip-flop can have two possible values. When input D = 0, the flip-flop undergoes a reset, which means the output would be set to 0. When input D = 1, the flip-flop does a set, which makes the output 1.
A D-type flip-flop differs from a D-type latch, as in a latch a clock signal is not provided, whereas with a D-type flip-flop a clock signal is needed to change states. A D-type flip-flop can be constructed with a pair of SR latches and with an inverter connection between S and R inputs for single data input. The S and R inputs can never be both high or low at same time. One of the salient features of a D-type flip-flop is its ability to "latch" and store and remember data. This property is used in creating a delay in progress of the data in the circuit used.
There are several applications in which a D-type flip-flop is used, such as in frequency dividers and data latches.