The read head of a hard-disk drive might seem an unlikely place to hunt for the future of memory technology. But TDK-Headway Technologies, in Milpitas, Calif., is betting that the lowly magnetic tunnel junction—the device it makes to read data off hard-disk platters—could be redesigned and repackaged to create a new way of storing information.
Magnetoresistive random-access memory, or MRAM, has undergone a few incarnations already. But TDK-Headway and a number of other companies are now converging on a scheme they say could upend the memory business. Dubbed spin-transfer torque (STT) MRAM, it promises speed and reliability comparable to that of static random-access memory, or SRAM—the quick-access memory embedded inside microprocessors—along with the “nonvolatility” of flash, the storage of smartphones and other portables.
In June, at the 2014 Symposia on VLSI Technology and Circuits in Honolulu, Guenole Jan, who heads up characterization and magnetic design for TDK-Headway’s MRAM team, presented results on the company’s new 8-megabit STT-MRAM test chip. The capacity of the chip itself—roughly what would be expected from a small patch of embedded flash—was not intended to turn heads.
Instead, the team had a few other things to show off. One was the write speed, which stands at 1.5 nanoseconds. That’s fast enough, Jan says, to compete with the SRAM that takes up most of the memory space on a modern microprocessor: the level-three cache. A second item was the team’s manufacturing process, which is used to make an array of memory cells that can withstand some of the critical last steps of the chipmaking process, which demand temperatures as high as 400 °C.
This is quite a feat for STT-MRAM, in which each cell is made from a magnetic tunnel junction, a delicate pillar of layered materials. The junction usually consists of more than 10 different layers, says Gill Lee, a senior director in the silicon systems group at Applied Materials, in Santa Clara, Calif.; some of them can be less than a nanometer thick. When these layers are etched into pillars, Lee notes, some material can be ejected and then redeposited along the sides of the pillar, shorting out or damaging the device.
STT-MRAM is a lower-energy alternative to an earlier version of MRAM, which used current flowing through wires to create a magnetic field that could set the magnetization of a bit in either one direction or another. In STT-MRAM, the bit flipping is done by passing a current through the magnetic tunnel junction. Applying voltage draws current through a “reference layer,” which is often made up of two oppositely magnetized layers. The electrons flowing through the stack align their spins to match the direction of magnetization of each layer. The spin-aligned electrons can then tunnel through an insulating barrier into a “free layer.” There, they “torque” the spins of the free layer’s electrons, imparting their spin to them and magnetizing that layer. A similar process of spin selection occurs when the voltage is reversed; electrons enter from the free-layer side of the stack, bounce off the insulating layer, and become polarized, causing spins in the free layer to point in the other direction.
The two different states can be detected by running current through the device. The stack will have low resistance when the magnetization of the free layer and topmost part of the reference layer point in the same direction and high resistance when they point in opposite directions.
Since SRAM takes six transistors to make a cell and STT-MRAM needs just one, it could potentially be used to make a more compact working memory. But the technology is likely to be used earlier as an energy-saving alternative to small-capacity embedded flash, which is used to store vital information such as network keys on mobile chips and chip-based sensors.
The mobile chip giant Qualcomm has also been working on STT-MRAM, and in a recent test of TDK-Headway’s chips, it found no errors in data retention after 528 hours at 150 °C. Seung Kang, who leads R&D on advanced memory technologies at Qualcomm’s headquarters in San Diego and reported the result at the symposia, says his company is less interested in replacing existing memories than it is in revamping the basic memory structure of the system-on-a-chip. “We call it nonvolatile working memory,” Kang says. “That’s kind of a new class.” One potential application of the technology, he says, is as a form of both storage and working memory in future wireless sensors, for which energy consumption and longevity are priorities.
Other companies are targeting stand-alone memory chips. At the same symposia in Honolulu, Samsung reported success in making cells that could potentially be fabricated using a 15-nanometer manufacturing process, the state of the art today. That could put STT-MRAM in line as a replacement for dynamic RAM computer memory.
In fact, STT-MRAM is already making small inroads on that front. Everspin Technologies, a spin-off of Freescale Semiconductor based in Chandler, Ariz., has shipped samples of a 64-Mb chip that uses a common DRAM interface.
Everspin’s first STT-MRAM chip is built with 90-nm-node technology, which puts it generations behind cutting-edge memory chips in terms of density. But Joe O’Hare, the company’s director of marketing, says that Everspin thinks its chip could find a home as a form of “persistent DRAM” that could afford greater protection against power outages to data centers and storage devices. The company expects to ramp up sales early next year.
Everspin hopes to boost the capacity of its next chips, and it is looking into switching to magnetic tunnel junctions in which the magnetization runs perpendicular to the layers instead of parallel to them. This architecture, which is now being pursued by Samsung, TDK-Headway, and others, has been shown to be more energy efficient and easier to miniaturize. “There’s a lot on our to-do list,” says O’Hare.
STT-MRAM may be claiming some of the enthusiasm once reserved for other alternative memories, such as ferroelectric RAM, phase-change memory, and resistive RAM. But its success will come down to manufacturing technology and how well it can compete on cost.
Hard-disk read-head tools make just one magnetic tunnel junction at a time and so must be adapted for high-throughput operation. “The issue is making a million or a billion of these devices on a chip and having good yields and identical properties on all devices,” says TDK-Headway’s Jan.
“I think [STT-]MRAM has all the desired features—speed, nonvolatility, low power, low energy, almost unlimited endurance,” says Lee of Applied Materials. But, he adds, “there’s still work to do.”