Researchers at Pacific Northwest National Laboratory developed the OpenCGRA tool to accelerate the design of new coarse-grained reconfigurable array (CGRA) chip architectures to achieve higher processing performance and efficiency without the benefit of more, smaller transistors.
CGRAs are hardware accelerators that showcase a design flexibility competitive to current general-purpose central processing units, yet display high energy efficiency. The hardware-software codesign elements of CGRAs have the potential to maximize computing performance with minimal energy input.
"OpenCGRA helps domain science researchers collaborate with computer scientists to develop potential CGRAs from top-level models to hardware designs," says PNNL computer scientist Cheng Tan, lead author of "OpenCGRA: An Open-Source Unified Framework for Modeling, Testing, and Evaluating CGRAs," presented at the 2020 IEEE 38th International Conference on Computer Design.
OpenCGRA reduces months of hardware design and potentially years of prototyping and fabrication to hours of simulation and evaluation. It is freely available as open-sourced software on GitHub.
From Pacific Northwest National Laboratory
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