Regulatory bodies as well as end customers find themselves striving for higher efficiency in DC-DC power supplies. New designs require lower Specific On-resistance while not sacrificing Unclamped Inductive Switching (UIS) capability or increasing switching losses. The shielded gate MOSFET has provided the answer for designers of DC-DC power supplies in the 30 V to 200 V range. RDS on reductions of 50% or greater have been realized with improved switching performance leading to higher efficiencies and opening the door for higher frequency operation.
Power Design Challenges
Designers are continually facing the challenge of designing higher power density DC-DC designs with increased efficiency. Advances in power MOSFET technology have helped to maintain this initiative. The power MOSFET designer must consider the trade-offs between RDS on and Q g as reducing one typically increases the other. A new TRENCH MOSFET process allows for a reduction in RDS on WITHOUT incurring a Q g penalty. This technology, known as shielded gate, enables reduction of the epi resistance associated with achieving the BV dss, the key component of RDS on, in Mid-voltage MOSFETs. As shown below in Figure 1, the technology has particular benefits in the >100 V area.
Fig 1 Components of RDS on for Conventional Trench
Figure 1 shows the RDS on components comparing a 30 V with a 100 V rated conventional TRENCH MOSFETs. The RDS on contribution from the epitaxial is much larger percentage for the 100 V. Using a charge balance technique like the shielded gate, this epitaxial resistance can be reduced by more than half without increasing the total Q g or the Q gd component.
The Charge Balance Technique
Figure 2 compares the cross-sections of a conventional and a shielded gate trench device. By incorporating a shield electrode for charge balancing, the resistance and length of the region supporting the voltage is reduced and a significant reduction in RDS on can be realized.