In the recent years Solid State Drives (SSD) are rapidly gaining popularity not only in the market of personal computing, but in enterprise servers as well. Compared to traditional hard disk drives SSDs have a lot of advantages, they are faster and more durable. However, these advantages come with drawbacks, the granularity of the erase operation is smaller than that of the write operation, moreover, as free pages become scarcer the performance drops. These reasons make various methods necessary, which improve the performance and the lifespan of the drive. Furthermore, the SSD needs to provide an interface that emulates the behaviour of a block device.
The host controllers of SSDs have numerous tasks including address translation, garbage collection and wear levelling. In this thesis I present the properties and structure of flash memories. I address the algorithms that solve the problems with flash memories.
I introduce an SSD simulator software, review the design of this simulator and also the implemented algorithms (Sector Map FTL, Block Map FTL, Hybrid FTL, NFTL, Greedy GC, D-Choices GC, WECO). I also present three methods of supplying the simulator with IO data. Finally, I evaluate measurements of the implemented algorithms with my SSD simulator software.