1971-1974: 4004, 8008 and 8080
The 4004, manufactured from 1971 to 1981, was the first commercially available processor as well as the first complete CPU on a single chip. The chip was packaged in a 16-pin ceramic dual in-line package and was initially released with a clock speed of 108 KHz (and scaled up to 740 KHz). Produced in a 10 μm (10,000 nm) process, the 4004 had 2,300 transistors and delivered a performance of 0.07 MIPS.
The 8-bit 8008 replaced the 4004 in 1972 with 0.5 to 0.8 MHz clock speed and 3,500 transistors, and was primarily used in the TI 742 computer. The 8080 followed in 1974 with 4,500 transistors in 6,000 nm with up to 2 MHz and became famous for being used in the Altair 8800 as well as in Boeing's AGM-86 cruise missile.
None of these chips were sold in considerable volumes.
1978-1982: iAPX 86 – 8086, 8088 and 80186 (16-bit)
The IBM 5150, the first PC, came with the 8088 (5-8MHz), which was identical to the 8086 with the exception of its 8-bit internal bus. In 1982, Intel launched the 80186 CPU, which was also based on the 8086, but was built in 2,000 nm and hit more than 1 MIPS at 6 MHz clock speed. The Tandy 2000 was among the first PCs that used the 80186.
1981: iAPX 432
Introduced in 1981, the 432 was Intel's first 32-bit design – an amazingly complex design for its time that integrated hardware-based multitasking and memory management features. Designed for high-end systems, the downfall of the 4-8 MHz 432 was the fact that it was much more expensive to produce and slower than the emerging 80286 design.
While the 432 was originally designed as a replacement for the 8086 series, the project was ended in 1982.
The 80286 is remembered as the Intel processor that provided the highest performance gain over its predecessor and one of the most cost-efficient processors Intel ever produced. In 2007, Intel stressed that only the new Atom processor was about as cost-efficient as the 80286 25 years earlier.
1985-1994: 386 and 376
In 1988, Intel followed up with the 1,000 nm 386SX, which had a narrower 16-bit bus to target mobile and low-cost desktop computing systems. Although the 386SX remained fully 32-bit capable internally, the data bus was cut down to 16 bits to simplify circuit board layout and reduce costs. Additionally, although not critical at the time, only 24 pins were connected to the 386SX's address bus, which effectively limited it to addressing 16MB of memory.
Both of the chips lacked a math coprocessor, and due to early problems with the i387 coprocessor not being production-ready in time for the 80386, both chips had to fall back to the 80287 as their math coprocessor until the 80387 was released to the market.
Intel's first notebook chip, the 386SL, arrived in 1990 as a highly integrated design with on-chip cache, bus, and memory controller. The processor had 855,000 transistors and ran between 20 and 25 MHz. The 376 (1989) and 386EX (1994), both for embedded systems, completed the 376/386 processor family. Despite it becoming obsolete as a personal computer CPU in the early '90s, Intel continued to manufacture the 80386 family until September of 2007, due to market demand for the chip to be used in embedded systems and the chip's wide use by the aerospace industry.
1989: 486 and i860
In 1992, Intel introduced an update as the 486DX2 (SX2) with up to 66 MHz, while the 486SL as an enhanced 486SX was offered for notebooks (up to 33 MHz, 800 nm, 1.4 million transistors). The final stage of the 486 series was the 486DX4 with up to 100 MHz, which was marketed as an economical solution for those who did not want to spend more money on the new Pentium systems. The DX4 was built in a 600 nm process, had 1.6 million transistors and was rated at 70.7 MIPS.
1989 was also the release year of the i860, Intel's attempt to enter the RISC processor race and the company's second major shot at the high-end computer segment. The i860 and i960 never succeeded and were canceled in the early 1990s.
1993: Pentium (P5, i586)
The P5 Pentium launched with 60 MHz in 1993 and was available with up to 200 MHz (P54CS) in 1996. The original 800 nm design had 3.1 million transistors, but scaled to 3.3 million in the 350 nm 1996 design. The P55C was announced in 1997 with MMX (Multimedia Extensions) and expanded the processor design to 4.5 million transistors and 233 MHz clock speed. The mobile version of the Pentium MMX remained available until 1999 and reached 300 MHz.
1994-1999: Bumps in the road
In 1994, a professor at Lynchburg College discovered a bug in the Intel P5 Pentium floating point unit that affected several models of the original Pentium processor. The bug, known as the Pentium FDIV bug, causes the processor to return incorrect decimal results in certain division operations, which stood to cause issues in fields like mathematics and engineering, where precise results were needed. Although rare, Byte Magazine estimated that about 1 in 9 billion divides would produce incorrect results. Intel attributed the flaw to missing entries in the processor's lookup table used by floating point division circuitry.
In 1999, Intel released the Pentium III processor, which was the first x86 processor to feature a unique ID number dubbed the PSN or Processor Serial Number. The PSN could be readily accessed by software if not disabled by the user in the BIOS, through use of the CPUID instruction. After its discovery, the PSN caused Intel to come under fire from a number of groups, including the European Parliament, which cited privacy concerns over the ability of PSN to be used by surveillance groups to identify individuals. Intel subsequently removed the PSN feature from its future processors, including the Tualatin-based Pentium IIIs.
1995: Pentium Pro (P6, i686)
Other than what the name implies, the Pentium Pro's architecture was different from the regular Pentiums and supported out of order execution, for example. In addition to the different architecture, the Pentium Pro had a 36-bit address bus, which supported up to 64GB of memory.
The Pentium Pro was built in 350 nm, had 5.5 million transistors, and came in several variants with clock speeds ranging from 150 and 200 MHz. Its most famous application was the integration in the ASCI Red supercomputer, which was first to break through the 1 TFLOPS performance barrier.
1997: Pentium II and Pentium II Xeon
The Pentium II was released with the 350 nm Klamath core (233 and 266 MHz). Deschutes arrived as a shrink to 250 nm and clock speeds up to 450 nm in 1998, and was also offered as Pentium II Overdrive as an upgrade option for the Pentium Pro. Mobile Pentium II processors got the 250 nm Tonga and 250 nm and 250nm/180 nm Dixon cores.
In the same year, Intel also offered the Deschutes core as a Pentium II Xeon with larger cache and dual-processor support.
The first Celeron series was based on the 250 nm Covington core for desktops and the 250 nm Mendocino core (19 million transistors, including L2 on-die cache) for notebooks. The processors were available from 266 to 300 MHz on the desktop and up to 500 MHz on the mobile side, and were updated well into the days of the succeeding Pentium III. Today's Celerons are based on Sandy Bridge architecture.
1999: Pentium III and Pentium III Xeon
The transistor count jumped from 9.5 million in Katmai to 28.1 million in the following cores due to the integrated L2 cache. The initial clock speed was 450 MHz and eventually reached 1,400 MHz with Tualatin. Intel was criticized to have rushed out the first gigahertz versions to compete with AMD's Athlon, which forced the company to recall its gigahertz processors and re-release them at a later time.
Also noteworthy on the consumer side was the announcement of the Mobile Pentium III in 2000, which introduced SpeedStep and a scaling ability of clock speed of the processor, depending on its operation mode. The Mobile Pentium III was announced one day before the announcement of the Transmeta Crusoe processor, and many still believe tthat the Mobile Pentium III would not have been released without the pressure of Transmeta, which was famous for employing Linux inventor Linus Torvalds.
The Pentium III Xeon was the last Xeon processor tied to the Pentium brand. The chip was released with the Tanner core in 1999. On the controversy side, Intel introduced the PSN, a Processor Serial Number, with the Pentium III. The feature caused several privacy complaints, and Intel eventually removed the feature and did not carry it over to future CPUs.
2000: Pentium 4
Netburst launched with 1.3 and 1.4 GHz, increased to 2.2 GHz with the 130 nm Northwood core (55 million transistors) in 2002, and to 3.8 GHz with the 90 nm Prescott core (125 million transistors) in 2005. Intel also launched the first Extreme Edition processors with the Gallatin core in 2003.
Over time, the Pentium 4 series became increasingly confusing, with Mobile Pentium 4-M processors, Pentium 4E HT (hyperthreading) processors with support for a virtual second core, and Pentium 4F processors with the 65 nm Cedar Mill core (Pentium 4 600 series) in 2005. Intel planned to replace the Pentium 4 family with the Tejas processor, but canceled the project when it was clear that Netburst would not be able to reach clock speeds beyond 3.8 GHz. Core, the following architecture, was a dramatic turnaround to much more efficient CPUs with a strict power ceiling that put Intel's gigahertz machine in reverse.
Similar to its desktop processors, the Netburst processors suffered from excessive power consumption, which forced Intel to revise its processor architecture and strategy. The Netburst Xeons died with the dual-core Dempsey CPU with a clock speed of up to 3.73 GHz and 376 million transistors.
Today's Xeons are still based on the technology foundation that is also used for desktop and mobile processors, but Intel keeps them in a tight power envelope. The 2006 dual-core Woodcrest chip, a variant of the desktop Conroe chip, was the first representative of this new idea. The current Xeons are based on 32 nm Sandy Bridge and Sandy Bridge EP architecture, and Westmere processor designs. The CPUs have up to 10 cores and clock speeds up to 3.46 GHz, as well as up to 2.6 billion transistors.
Itanium was launched with the 180 nm Merced core in 2001 as a mainframe processor with 733 MHz and 800 MHz clock speed and 320 million transistors – more than six times the count of a desktop Pentium at the time. The Itanium 2 followed in 2002 (180 nm McKinley core, as well as 130 nm Madison, Deerfield, Hondo, Fanwood and Madison cores) and wasn't updated until 2010 when Intel launched the Itanium 9000 with the 90 nm Montecito and Montvale cores, as well as the 65 nm Tukwila core with a massive 24 MB on-die cache, as well as more than 2 billion transistors.
Despite persistent rumors that Intel will kill the Itanium at any time, there is a solid service ecosystem surrounding the processor.
Hyperthreading works by duplicating certain sections of the processor, allowing the operating system to address a single physical processor with two logical processors per core. The operating system is then able to execute two threads simultaneously by allowing one thread to run while the other is stalled, usually due to a data dependency.
At the time, Intel claimed a performance improvement of up to 30 percent over a non-hyperthreaded Pentium 4. In our previous tests, we've shown that a hyperthreaded 3 GHz chip can surpass the speed of a non-hyperthreaded 3.6 GHz chip under certain conditions. Intel has continued to include hyperthreading as a feature in various processors, including the Itanium, Pentium D, Atom and Core i-Series CPUs.
2003: Pentium M
Banias dropped its clock speed to 900 MHz to 1.7 GHz, down from 2.6 GHz of the Pentium 4 Mobile. However, the processor was rated at just 24.5 watts TDP, while the Pentium 4 chip was at 88 watts. The 90 nm shrink was called Dothan and dropped its thermal design power to 21 watts. Dothan had 140 million transistors and clock speeds of up to 2.13 GHz.
The direct successor of Dothan was Yonah, which was released in 2006 as Core Duo and Core Solo, but was not related to the Intel Core micro-architecture. The Banias core and its impact on Intel is seen on the same level as the 4004, 8086 and 386 as the most significant milestones in the company's product history.
2005: Pentium D
Intel also released Extreme Editions of both processors and capped the maximum clock speed at 3.73 MHz and at a power consumption of 130 watts – the highest ever for any Intel consumer desktop processor (some server processors went up to 170 watts). Smithfield had 230 million transistors, Prescott 376 million.
2005-2009: Terascale Computing Research Program
The Teraflops Research Chip, codenamed Polaris, is an 80-core processor developed through the TSCR program. The chip features dual floating point engines, sleeping-core technology and 3D memory stacking among other things. The purpose of the chip was to experiment on how to effectively scale beyond four cores on a single die and to build a chip that was capable of producing a teraflop of computing performance.
The Single Chip Cloud Computer (SCC) is a 48-core processor developed through the TSCR program. The idea behind the SCC chip was to have a chip in which several sets of separate cores were able to communicate directly with each other, similar to the way servers in a data center communicate. The chip contains 48 Pentium cores in a 4 x 6 two-dimensional mesh of 24 tiles sharing two cores and 16KB of cache each. The tiles allow the cores to communicate with each other instead of sending and retrieving data from the main memory, which greatly improves performance.
2006: Core 2 Duo
The Core micro-architecture was preceded by one of the most significant restructurings at Intel, as well as a substantial repositioning of the company. While Conroe was developed, Intel positioned its remaining Pentium and Pentium D processors to drive AMD into an unprecedented price war in 2005 and 2006, while the Core 2 Duo processor regained the performance lead over AMD in 2006. Conroe was launched with 1.2 GHz to 3 GHz clock speeds and as a chip with 291 million transistors. The CPUs were updated with a 45 nm Penryn shrink in 2008 (Yorkfield for quad-cores).
While Intel always attempted to deliver a die shrink every two years, the arrival of Core 2 Duo also marked the introduction of the company's tick-tock cadence, which dictates a shrink in uneven years and a new architecture in even years.
2007: Intel vPro
Major technologies included in vPro:
Intel Active Management Technology (AMT) – A set of hardware features that allow systems administrators to remotely access and manage a computer even when the computer is powered off. Remote configuration technology for AMT allows basic configuration to be performed on systems that do not yet have an operating system or other management tools installed.
• Intel Trusted Execution Technology (TXT) – Verifies the authenticity of a computer using the Trusted Platform Module (TPM). TXT then builds a chain of trust using various measurements from the TPM, which are then used to make trust-based decisions about what software is able to run and allows systems administrators to ensure sensitive data is only processed on a trusted platform.
• Intel Virtualization Technology (VT) – A hardware-based virtualization technology that allows multiple workloads to share a common set of resources in full isolation. Additionally, VT removes some of the performance overhead incurred by solely using software virtualization.
2008: Core i-Series
Westmere was effectively replaced by the 32 nm Sandy Bridge architecture in 2011, which shrunk in 2012 to 22 nm in the Ivy Bridge generation (1.4 billion transistors for quad-core processors).
The initial Atom lacked integration and did not succeed in markets other than netbooks. Even the updated Lincroft (released in 2010 as Z600) could not change that scenario. The current Atom generation for desktop and netbook applications is the 32 nm Cedarview generation (D2000 and N2000 series, released in 2011). Intel attempted to expand Atom into other application areas, such as TVs, but failed largely due to the lack of integration of Atom.
Atom SoC was released in 2012 with the Medfield core: The Z2000 series is Intel's first offering for devices such as phones and tablets since its ARMv5-based Xscale core, which the company offered between 2002 and 2005.
2010: HD Graphics
With Intel's continued move from its Hub Architecture design to the new Platform Controller Hub (PCH) design, the Northbridge chip was eliminated entirely, and the integrated graphics hardware was moved to the same die as the CPU. Unlike the previous integrated graphics solution, which had a poor reputation of lacking performance and features, Intel's HD Graphics once again made integrated graphics competitive with discrete graphics manufacturers through major performance increases and low power consumption. Intel HD Graphics came to dominate the low-to-midrange device market, picking up an even more substantial share in the mobile device sector. The Intel HD Graphics 5000 (GT3) has a TDP of 15 watts, 40 execution units and a performance output of up to 704 GFLOPS.
In 2013, Intel launched its Iris Graphics and Iris Pro Graphics on limited set of its Haswell processors, as a high-performance version of HD Graphics. The Iris Graphics 5100 is largely the same as the HD Graphics 5000 but features an increased TDP of 28 watts, an increased maximum frequency of 1.3 GHz and a small increase in performance of up to 832 GFLOPS. The Iris Pro Graphics 5200, referenced as Crystalwell by Intel, is the first of Intel's integrated solutions to have its own embedded DRAM, featuring a 128MB cache for performance improvements in bandwidth-limited tasks. In late 2013, Intel announced that the Broadwell-K series of processors will feature Iris Pro Graphics in place of HD Graphics.
2010: Many Integrated Core Architecture and Xeon Phi
In May of 2010, Intel debuted its first MIC prototype board, codenamed Knights Ferry, which was a PCIe card sporting 32 cores at 1.2 GHz and four threads per core. The development board also featured 2GB of GDDR5 memory, 8MB of L2 cache, power consumption of around 300 watts and performance exceeding 750 GFLOPS.
In 2011, Intel announced an improvement to its MIC architecture, codenamed Knights Corner, which was made using the 22 nm process with Intel's Tri-gate transistor technology and had over 50 cores per chip. Knights Corner was Intel's first commercial MIC product and quickly gained adoption from many companies in the supercomputer industry, including SGI, Texas Instruments and Cray. Knights Corner was officially rebranded as Xeon Phi by Intel in 2012 at the Hamburg International Supercomputing Conference.
Intel revealed its second-generation MIC architecture, dubbed Knights Landing, in June of 2013. Intel announced that the Knights Landing products would be built with up to 72 Airmont cores with four threads per core using the 14 nm process. Additionally, Intel stated that each card would support up to 384GB of DDR4 RAM, include 8-16GB of 3D MCDRAM, and have TDPs ranging from 160 to 215 watts.
Current Xeon Phi products include the Xeon Phi 3100, Xeon Phi 5110P and the Xeon Phi 7120P, all based on the 22nm process. The Xeon Phi 3100 is capable of more than 1 teraflops of double-precision floating point performance, with memory bandwidth of 320GBps and a recommended price tag of under $2,000. At the high end of the spectrum, the Xeon Phi 7120P is capable of more than 1.2 teraflops of double-precision floating point performance, 352GBps memory bandwidth and a price tag north of $4,100.
2012: Intel SoCs
Like the newly released Avoton chips for servers, the Baytrail chips are true SoCs, with all of the components necessary for tablets and laptop computers, and feature TDPs as low as 4 watts. In addition to the Atom-based SoCs, around early 2014, Intel began a serious push to bring its more popular desktop architectures into the high-end tablet market by introducing the Haswell architecture 'Y' SKU suffix ultralow-power processors with TDPs around 10 watts.
In late 2014, Intel started releasing chips based on the Broadwell architecture, further extending Intel's venture into the SoC market with quad-core chips featuring TDPs as low as 3.5 watts and support for up to 8GB of LPDDR3-1600 RAM.
2013: Core i-Series – Haswell
With the introduction of Haswell, Intel also introduced the 'Y' SKU suffix for its new low-power processors designed for ultrabooks and high-end tablets (10-15 watt TDP). Haswell scaled up to 18 cores with the Haswell-EP line of Xeon processors, up to 5.69 billion transistors and clock speeds of up to 4.4 GHz.
In 2014, Intel released a refresh of the Haswell lineup called Devil's Canyon, which features a modest boost in clock speeds and an improved thermal interface material to alleviate heat issues faced by enthusiasts and overclockers. The Broadwell die shrink in 2014 scaled down the architecture to 14 nm, but did not replace the full line of Haswell CPUs, instead forgoing the inclusion of low-end desktop CPUs.