|Manufacturer:||Digital Equipment Corporation|
|Year First Shipped:||1966|
|Word Size:||18 bits|
|Logic Type:||PNP Transistor FLIP CHIPs|
|Memory Speed:||1 μsec|
|Physical Address Size:||15 bits (32K words)|
|Virtual Address Size:||13 bits (direct), 15 bits (extended)|
|Memory Management:||bounds register|
|Price:||US$30K (8KW system)|
Its principal intended use was for real-time systems, including data recording and process control. A variety of models were offered; the basic system provided 8K words of core memory, and the PDP-9/L was a cost-reduced system with cheaper peripherals and 4KW of memory.
Instructions had a 4-bit opcode, 1 bit of indirect, and 13 bits of address. It was a load-store architecture, with a single accumulator. Multiply/divide was a hardware option, the KE09A, which also performed shifting.
Use of more than 8KW of main memory required the Memory Extension Control, KG09A. A memory management option, the KX09A, which included a boundary register to set the boundary between protected and un-protected memory, and two modes for the CPU, was also available.
(All available online through BitSavers.)
- "PDP-9 User Handbook"