Alison Steer, Linear Technology Corp.
11/30/2012 9:15 AM EST
In medical applications such as MRI, ultrasound, CT scanners, and digital X-ray, high channel count analog-to-digital converters (ADCs) are used to sample large arrays of data.
Serial interfaces are used to acquire the sampled data to reduce the number of pins on the ADC and FPGA, and save board space. With board real estate at a premium and FPGA pins a valuable commodity, the advantages of serial data converter interfaces over parallel are clear. Today, there are two choices of serial interfaces that are suitable for high speed data converters.
The first is a serial clock-data-frame (CDF) interface, which combines a serialized LVDS (low voltage differential signaling) data stream, as well as a differential clock to accurately collect this data and framing clock to establish data sample boundaries.
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