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The physical limits associated with CMOS devices require the development of new computational architectures. Quantum-dot cellular automata (QCA) offers a low power, high-speed computational architecture. This paper demonstrates the integration of CMOS, QCA, and SET technologies on a single silicon die. A capacitive voltage divider is used to reduce standard CMOS logic voltage levels to millivolt control voltages for a two-dot QCA cell. SET electrometers are used to read the state of the QCA cell, and the resultant signal is applied to a CMOS voltage comparator, which provides a CMOS logic level voltage output.