Back Lapping Semiconductor Wafers
This process is usually applied to silicon, the key substrate for semiconductor devices. Back lapping is also a key process for compound semiconductors, such as gallium arsenide (GaAs) and indium phosphide (InP). The downstream use of these materials includes communication devices, such as cell phones and modems.
Technical ConsiderationsSemiconductor material is normally fragile. The first consideration must be the residual strength of the wafer after back lapping. Final thickness requirements can vary between 0.050 and 0.200 mm. Certain processes can also require thinning to 0.010 mm (10 microns). After thinning, a small area device of 0.010 mm thickness can be manipulated easily, while a large 125 mm diameter wafer that is 0.1 mm thick can present problems. If the final thickness makes the wafer too fragile to be easily manipulated, it has to be supported on a substrate, which can be another, thicker wafer or a glass or ceramic disc. For accurate work, the substrate should be substantial, with a thickness-to-diameter ratio (aspect ratio) of at least 1:7.
If support is required, the second consideration is whether to make a permanent or temporary bond. This choice depends on the future use of the material.
The final consideration is the accuracy required in terms of mean thickness and thickness variation. Achieving a thickness tolerance of ±0.001 mm over the area of a small device is comparatively simple, but a larger tolerance would be required for a whole wafer. While the surfaces of production wafers are normally highly parallel, the wafer profile is not flat. The mechanics of crystal growth processes and wafer preparation result in some wafers that are “saddle shaped,” with distortions from flatness that may be as large as 0.005 mm.
Protecting the Wafer FrontWith careful use of the cementing described below, damage of the wafer front surface can be avoided. Additional protection can be added by:
- Coating the front surface with photo-resist—this is normal when devices such integrated circuits are on the surface
- Using a proprietary polyvinyl chloride (PVC) or similar adhesive film
- Interposing a lens tissue, pre-soaked in cement, between the wafer and the mounting plate
Direct Mounting on the PlateThe wafer is cemented to a disc or the plate of a precision jig. For producing thin sections, a hard cement such as Crystalbond is used, since a softer wax is eroded away during lapping, which could lead to edge chipping. The surface of the mounting plate or disc must be flat, and this is achieved by first lapping it on a known lapping plate. All surfaces should be clean and grease-free, since deposits can give local deviations from flatness, which will result in thickness variations after lapping.
A second disc is required as a pressure plate. The disc or plate, the wafer and the pressure plate are heated above the melting point of the thermoplastic cement. Two methods can then be used to apply the cement: the direct-pressure method or the capillary method.
In the direct pressure method, a relatively thick layer of cement is spread over the mounting plate. The front surface of the wafer is pressed into this layer, and then the pressure plate is applied. The assembly is then allowed to cool. A thin sheet of plastic material (or lens tissue) between the wafer and pressure plate prevents the latter being retained by excess cement. This method removes any local unevenness on the front face, since cement will fill in defects or connections. A possible pitfall is the “wedging” of the wafer if bubbles are allowed to enter the sample/mounting plate interface.
In the capillary method, the wafer, mounting plate and specimen plate are heated above the melting point of the cement, as in the previous method. A small amount of cement is then applied to the edge of the wafer, which will be pulled into the wafer/mounting plate interface. A very thin uniform layer results, as long as the gap between the two surfaces is kept sufficiently small.
Cementing to a SubstrateThe methods previously described hold the wafer to the substrate and, in turn, the substrate to the mounting plate. The wax bond of the substrate to the mounting plate or jig should have a lower softening point than that used to bond the wafer to the substrate. The substrate can then be removed from the mounting plate by heating to the lower temperature, while the wafer and substrate remain cemented together. Alternatively, the substrate can be held with a vacuum jig.
Permanent BondingPermanent bonding is normally done with epoxy resin to a glass or ceramic substrate. The surface of the substrate should again be flat to better than the tolerance required on wafer thickness. A thin uniform layer of epoxy is then applied to the surface of the substrate (using a combing or stippling action), and the wafer is placed on the epoxy. The substrate, wafer and a suitable pressure plate are heated to not more than 30°C, at which point the epoxy will become very fluid. A plastic interface film sheet is put between the wafer and the pressure plate, and the whole is left for the epoxy to cure. This produces a uniform epoxy layer less than 0.1 mm thick between the wafer and substrate. The epoxy bond can be further strengthened with an additional two to three hours cure at 40 to 50°C. After mounting, the substrate can be held on a mounting plate or disc, or within the vacuum chuck.
The Lapping ProcessLapping is most economically carried out on a versatile, high-precision polishing machine using a scrolled cast iron plate. The machine used should have an applicable reciprocating roller bar mechanism to hold the sample in position while allowing for constant plate conditioning during the preparation process. The lapping material is usually medium grit (10 to 15 micron) silicon carbide powder, suspended in a lapping oil. Other lapping materials are medium grit aluminum oxide or diamond. Self adhesive abrasive papers, which are cleaner to use, can be used with a stainless steel plate or with small specimens and increased speed on smaller polishing machines.
The choice of abrasive depends on the type of material—a very aggressive abrasive, such as diamond will cause a deeper damage layer at the surface. Damage penetration can be reduced by decreasing the load on the sample and the plate speed as the final thickness is approached.
After lapping, the sample can be polished using chemo-mechanical suspensions of colloidal silica (0.125 micron) or aluminum oxide (0.3 micron). The slurry suspensions are pumped continuously over the plate. The highest quality of surface finish is obtained by giving a second polish using a very fine (0.05 micron) aluminum oxide suspension, preferably on a self-adhesive cloth pad fixed to a plain stainless steel plate. Damage to the wafer’s crystalline structure can be reduced by using very low loadings on the wafers, especially toward the end of the polishing process.
Measuring Wafer ThicknessThe only truly accurate method to measure wafer thickness is to measure the wafer thickness before and during the lapping process (see Figure 2). The original wafer mean thickness, t0, is known, and the initial thickness, t1, of the wafer and cement layer after mounting on a plate or substrate is also measured (the cement layer is t1 - t0). The variation of t1 around the periphery and across the wafer is a measure of the cement thickness variation, assuming the wafer thickness variation is small. A series of thickness measurements at fixed time intervals during the lapping process enables the end time (when the wafer reaches its required thickness) to be estimated. Provided no change occurs in the operating conditions, i.e. plate speed, specimen load, specimen drive speed, etc., processing times are very consistent.
The thickness, tm, of the wafer and cement layer is measured relative to the mounting plate, and the amount of wafer material removed is t1 - tm. Two or three measurements at fixed time intervals enable the stock removal rate in microns per minute to be calculated.
The thickness of the wafer is easily measured using a precision micromount, which allows direct measurement of thickness when the sample is mounted in a precision jig.
The micromount holds a mechanical gauge inside a massive stainless steel ring, which sits on the conditioning ring of the inverted jig with the stylus of the gauge in contact with wafer. To use the micromount, the jig is removed from the lapping plate, and any excess slurry is removed from the conditioning ring and wafer. The jig is inverted on its stand, and the micromount is put on the conditioning ring.
An “in situ” dial gauge attached to the precision jig and measuring the downward movement of the inner stem as the specimen is lapped is not truly accurate because it makes no allowance for any wear on the jig conditioning ring. This error means that the resulting wafer thickness is always thinner than indicated by the jig/dial gauge combination. The error can be minimized by the use of very hard ceramic materials as the wear ring material.
In comparison, a precision micromount uses the current surface of the conditioning ring only as a support (i.e., a true “zero”), and thus directly measures the amount of material removed from the wafer, particularly when the reading is compared with that at the wafer mounting plate or substrate.
In situ gauges do, however, generally make more than acceptable compromises for assessing wafer thickness during any specific back-lapping operation and provide a very repeatable means of assessing when a process is reaching its end-point.
Selected Area PolishingAn interesting new application has recently emerged that requires backside thinning of a packaged semiconductor device to allow the electronic circuitry on the wafer’s front side to be imaged under infrared light from the wafer’s backside. This allows point failures within the circuitry to be localized and evaluated. At full wafer thicknesses, silicon is semi-opaque to infrared wavelengths. Thinning to a remaining thickness of 100 microns provides sufficient transparency for backside emission microscopy.
This method has become necessary due to the increasing complexity and number of metallization layers seen in modern devices. The metal layers physically block important photonic information from view at the front side of the wafer. Selected area polishing can be applied to both standard plastic packages and (the generally military-required and some CPU) ceramic packages.
Further Reading1. Hazeldine, Tim and Rubin, Joseph, “Rapid Routes to Planar Polishing,” Materials World, Feb. 1998, published by The Institute of Materials.
2. Fynn and Powell, “Cutting and Polishing Optical and Electronic Materials,” 2nd Ed., published by Adam Hilger.
3. Hazeldine, Tim, “Annular Sawing,” European Semiconductor, October 1997, published by Angel Publishing.