  The adiabatic quantum-flux parametron (AQFP) is a promising energy-efficient
superconducting technology. Before technology mapping, additional buffer and
splitter cells need to be inserted into AQFP circuits to fulfill two special
constraints: (1) Input signals to a logic gate need to arrive at the same time,
thus shorter paths need to be delayed with buffers. (2) The output signal of a
logic gate has to be actively branched with splitters if it drives multiple
fanouts. Buffers and splitters largely increase the area and delay in AQFP
circuits. Na\"ive buffer and splitter insertion and light-weight optimization
using retiming techniques have been used in related works, and it is not clear
how much space there is for further optimization. In this paper, we develop (a)
a linear-time algorithm to insert buffers and splitters irredundantly, and (b)
optimization methods by scheduling and by moving groups of gates, called
chunks, together. Experimental results show a reduction of up to 39% on buffer
and splitter cost. Moreover, as the technology is still developing and
assumptions on the physical constraints are not clear yet, we also discuss the
impacts of different assumptions with experimental results to motivate future
research on AQFP register design.
