  Reversible logic has applications in low-power computing and quantum
computing. However, there are few existing designs for reversible
floating-point adders and none suitable for quantum computation. In this paper
we propose a space-efficient reversible floating-point adder, suitable for
binary quantum computation, improving the design of Nachtigal et al. Our work
focuses on improving the reversible designs of the alignment unit and the
normalization unit, which are the most expensive parts. By changing a few
elements of the existing algorithm, including the circuit designs of the RLZC
(reversible leading zero counter) and converter, we have reduced the cost about
68%. We also propose fault-tolerant designs for the circuits. The KQ for our
fault-tolerant design is almost sixty times as expensive as for a 32-bit
fixed-point addition. We note that the floating-point representation makes
in-place, truly reversible arithmetic impossible, requiring us to retain both
inputs, which limits the sustainability of its use for quantum computation.
