  The quantum-dot cellular automata (QCA) nano-technique has attracted computer
scientists due to its noticeable features such as low power consumption and
small size. Many papers have been published in the literature about the
utilization of this technology for de-signing many QCA circuits and for
presenting logic gates in an optimal structure. The T flip-flop, which is an
essential part of digital designs, can be used to design synchronous and
asynchronous counters. This paper presents a novel T flip-flop structure in an
optimal form. The presented novel gate was used to design an N-bit binary
synchronous counter. The QCADesigner software was used to verify the designed
circuits and to present the simulation results, while the QCAPro tool was used
for the power analysis. The proposed design required minimal power and showed
good improvements over previous designs.
