  The Square Kilometre Array (SKA) project will be the world largest radio
telescope array. With its large number of antennas, the number of signals that
need to be processed is dramatic. One important element of the SKA's Central
Signal Processor package is pulsar search. This paper focuses on the FPGA-based
acceleration of the Frequency-Domain Acceleration Search module, which is a
part of SKA pulsar search engine. In this module, the frequency-domain input
signals have to be processed by 85 Finite Impulse response (FIR) filters within
a short period of limitation and for thousands of input arrays. Because of the
large scale of the input length and FIR filter size, even high-end FPGA devices
cannot parallelise the task completely. We start by investigating both
time-domain FIR filter (TDFIR) and frequency-domain FIR filter (FDFIR) to
tackle this task. We applied the overlap-add algorithm to split the coefficient
array of TDFIR and the overlap-save algorithm to split the input signals of
FDFIR. To achieve fast prototyping design, we employed OpenCL, which is a
high-level FPGA development technique. The performance and power consumption
are evaluated using multiple FPGA devices simultaneously and compared with GPU
results, which is achieved by porting FPGA-based OpenCL kernels. The
experimental evaluation shows that the FDFIR solution is very competitive in
terms of performance, with a clear energy consumption advantage over the GPU
solution.
