  Low-density parity-check codes, a class of capacity-approaching linear codes,
are particularly recognized for their efficient decoding scheme. The decoding
scheme, known as the sum-product, is an iterative algorithm consisting of
passing messages between variable and check nodes of the factor graph. The
sum-product algorithm is fully parallelizable, owing to the fact that all
messages can be update concurrently. However, since it requires extensive
number of highly interconnected wires, the fully-parallel implementation of the
sum-product on chips is exceedingly challenging. Stochastic decoding
algorithms, which exchange binary messages, are of great interest for
mitigating this challenge and have been the focus of extensive research over
the past decade. They significantly reduce the required wiring and
computational complexity of the message-passing algorithm. Even though
stochastic decoders have been shown extremely effective in practice, the
theoretical aspect and understanding of such algorithms remains limited at
large. Our main objective in this paper is to address this issue. We first
propose a novel algorithm referred to as the Markov based stochastic decoding.
Then, we provide concrete quantitative guarantees on its performance for
tree-structured as well as general factor graphs. More specifically, we provide
upper-bounds on the first and second moments of the error, illustrating that
the proposed algorithm is an asymptotically consistent estimate of the
sum-product algorithm. We also validate our theoretical predictions with
experimental results, showing we achieve comparable performance to other
practical stochastic decoders.
