  This paper presents a high-level circuit obfuscation technique to prevent the
theft of intellectual property (IP) of integrated circuits. In particular, our
technique protects a class of circuits that relies on constant multiplications,
such as filters and neural networks, where the constants themselves are the IP
to be protected. By making use of decoy constants and a key-based scheme, a
reverse engineer adversary at an untrusted foundry is rendered incapable of
discerning true constants from decoy constants. The time-multiplexed constant
multiplication (TMCM) block of such circuits, which realizes the multiplication
of an input variable by a constant at a time, is considered as our case study
for obfuscation. Furthermore, two TMCM design architectures are taken into
account; an implementation using a multiplier and a multiplierless shift-adds
implementation. Optimization methods are also applied to reduce the hardware
complexity of these architectures. The well-known satisfiability (SAT) and
automatic test pattern generation (ATPG) attacks are used to determine the
vulnerability of the obfuscated designs. It is observed that the proposed
technique incurs small overheads in area, power, and delay that are comparable
to the hardware complexity of prominent logic locking methods. Yet, the
advantage of our approach is in the insight that constants -- instead of
arbitrary circuit nodes -- become key-protected.
