  This paper presents a physics-based analytical model for the MOS transistor
operating continuously from room temperature down to liquid-helium temperature
(4.2 K) from depletion to strong inversion and in the linear and saturation
regimes. The model is developed relying on the 1D Poisson equation and the
drift-diffusion transport mechanism. The validity of the Maxwell-Boltzmann
approximation is demonstrated in the limit to zero Kelvin as a result of dopant
freeze-out in cryogenic equilibrium. Explicit MOS transistor expressions are
then derived including incomplete dopant-ionization, bandgap widening, mobility
reduction, and interface charge traps. The temperature dependency of the
interface-trapping process explains the discrepancy between the measured value
of the subthreshold swing and the thermal limit at deep-cryogenic temperatures.
The accuracy of the developed model is validated by experimental results on a
commercially available 28-nm bulk CMOS process. The proposed model provides the
core expressions for the development of physically-accurate compact models
dedicated to low-temperature CMOS circuit simulation.
