  Recently, hardware technology has rapidly evolved pertaining to
domain-specific applications/architectures. Soon, processors may be composed of
a large collection of vendor-independent IP specialized for
application-specific algorithms, resulting in extreme heterogeneity. However,
integrating multiple vendors within the same die is difficult. Chiplet
technology is a solution that integrates multiple vendor dies within the same
chip by breaking each piece into an independent block, each with a common
interconnect for fast data transfer.
  Most prior chiplet research focuses on interconnect technology, but program
execution models (PXMs) that enable programmability and performance are missing
from the discussion. In chiplet architectures, a cohesive co-designed PXM can
further separate the roles of the different actors, while maintaining a common
abstraction for program execution. This position paper describes the need for
co-designed PXMs and proposes the Codelet PXM and associated architectural
features as a candidate to fill this need in extremely heterogeneous
chiplet-based architectures.
