  Graphs are essential for representing relationships in various domains,
driving modern AI applications such as graph analytics and neural networks
across science, engineering, cybersecurity, transportation, and economics.
However, the size of modern graphs are rapidly expanding, posing challenges for
traditional CPUs and GPUs in meeting real-time processing demands. As a result,
hardware accelerators for graph processing have been proposed. However, the
largest graphs that can be handled by these systems is still modest often
targeting Twitter graph(1.4B edges approximately). This paper aims to address
this limitation by developing a graph accelerator capable of terascale graph
processing. Scale out architectures, architectures where nodes are replicated
to expand to larger datasets, are natural for handling larger graphs. We argue
that this approach is not appropriate for very large-scale graphs because it
leads to under utilization of both memory resources and compute resources.
Additionally, vertex and edge processing have different access patterns.
Communication overheads also pose further challenges in designing scalable
architectures. To overcome these issues, this paper proposes TEGRA, a scale-up
architecture for terascale graph processing. TEGRA leverages a composable
computing system with disaggregated resources and a communication architecture
inspired by Active Messages. By employing direct communication between cores
and optimizing memory interconnect utilization, TEGRA effectively reduces
communication overhead and improves resource utilization, therefore enabling
efficient processing of terascale graphs.
