  We proposed in "Functional Constraint Extraction From Register Transfer Level
for ATPG" that is currently submitted to TVLSI, an automatic functional
constraint extractor that can be applied on the RT level. These functional
constraints are used to generate pseudo functional test patterns with ATPG
tools. The patterns are then used to improve the verification process. This
technical report complements the work proposed as it contains the
implementation details of the proposed methodology and shows the detailed
intermediate and final results of the application of this methodology on a
concrete example.
