  The Cherenkov Telescope Array (CTA) is the next generation ground-based very
high energy gamma-ray observatory. The Large-Sized Telescope (LST) of CTA
targets 20 GeV -- 1 TeV gamma rays and has 1855 photomultiplier tubes (PMTs)
installed in the focal plane camera. With the 23 m mirror dish, the night sky
background (NSB) rate amounts to several hundreds MHz per pixel. In order to
record clean images of gamma-ray showers with minimal NSB contamination, a fast
sampling of the signal waveform is required so that the signal integration time
can be as short as the Cherenkov light flash duration (a few ns). We have
developed a readout board which samples waveforms of seven PMTs per board at a
GHz rate. Since a GHz FADC has a high power consumption, leading to large heat
dissipation, we adopted the analog memory ASIC "DRS4". The sampler has 1024
capacitors per channel and can sample the waveform at a GHz rate. Four channels
of a chip are cascaded to obtain deeper sampling depth with 4096 capacitors.
After a trigger is generated in a mezzanine on the board, the waveform stored
in the capacitor array is subsequently digitized with a low speed (33 MHz) ADC
and transferred via the FPGA-based Gigabit Ethernet to a data acquisition
system. Both a low power consumption (2.64 W per channel) and high speed
sampling with a bandwidth of $>$300 MHz have been achieved. In addition, in
order to increase the dynamic range of the readout we adopted a two gain system
achieving from 0.2 up to 2000 photoelectrons in total. We finalized the board
design for the first LST and proceeded to mass production. Performance of
produced boards are being checked with a series of quality control (QC) tests.
We report the readout board specifications and QC results.
