  Previous cryogenic electronics studies are most above 4.2K. In this paper we
present the cryogenic characterization of a 0.18{\mu}m standard bulk CMOS
technology(1.8V and 5V) at sub-kelvin temperature around 270mK. PMOS and NMOS
devices with different width to length ratios(W/L) are tested and characterized
under various bias conditions at temperatures from 300K to 270mK. It is shown
that the 0.18{\mu}m standard bulk CMOS technology is still working at
sub-kelvin temperature. The kink effect and current overshoot phenomenon are
observed at sub-kelvin temperature. Especially, current overshoot phenomenon in
PMOS devices at sub-kelvin temperature is shown for the first time. The
transfer characteristics of large and thin-oxide devices at sub-kelvin
temperature are modeled using the simplified EKV model. This work facilitates
the CMOS circuits design and the integration of CMOS circuits with
silicon-based quantum chips at extremely low temperatures.
