  Memristor-based crossbar arrays represent a promising emerging memory
technology to replace conventional memories by offering a high density and
enabling computing-in-memory (CIM) paradigms. While analog computing provides
the best performance, non-idealities and ADC/DAC conversion limit
memristor-based CIM. Logic-in-Memory (LIM) presents another flavor of CIM, in
which the memristors are used in a binary manner to implement logic gates.
Since binary neural networks (BNNs) use binary logic gates as the dominant
operation, they can benefit from the massively parallel execution of binary
operations and better resilience to variations of the memristors. Although
conventional neural networks have been thoroughly investigated, the impact of
faults on memristor-based BNNs remains unclear. Therefore, we analyze the
impact of faults on logic gates in memristor-based crossbar arrays for BNNs. We
propose a simulation framework that simulates different traditional faults to
examine the accuracy loss of BNNs on memristive crossbar arrays. In addition,
we compare different logic families based on the robustness and feasibility to
accelerate AI applications.
