  With the downscaling of MOSFETs to nanometer dimensions, transistor
electrical parameter variability is produced by factors other than variations
of physical dimensions and doping profiles, which are there since device
fabrication and remain static over time. Besides these time-zero variability
factors, factors that lead to performance variability from one instant in time
to the other start playing a significant role. Random Telegraph Noise (RTN) is
among these relevant time-dependent variability sources. In this work we extend
the knowledge of the time-dependent random variability induced by RTN, by
providing a statistical model for transistor threshold voltage jitter produced
by RTN. The area scaling of threshold voltage jitter is detailed and discussed,
supporting designers in transistor sizing towards a more reliable design. Not
only the jitter expected in a transistor is modeled, but also its variability
among transistors that by design should be equal. Besides analytical modeling,
Monte Carlo simulations are run. The simulations account for the charge carrier
capture and emission events related to RTN, allowing the proper evaluation of
the RTN related jitter. The Monte Carlo simulations validate the analytical
model and illustrate the area scaling of jitter and its variability.
