  Comprehensive and well-defined specifications are necessary to perform
rigorous and thorough validation of system-on-chip (SoC) designs. Message flows
specify how components of an SoC design communicate and coordinate with each
other to realize various system functions. Message flow specifications are
essential for efficient system-level validation and debug for SoC designs.
However, in practice such specifications are usually not available, often
ambiguous, incomplete, or even contain errors. This paper addresses that
problem by proposing a specification mining framework, FlowMiner, that
automatically extracts message flows from SoC execution traces, which, unlike
software traces, show a high degree of concurrency. A set of inference rules
and optimization techniques are presented to improve mining performance and
reduce mining complexity. Evaluation of this framework in several experiments
shows promising results.
