  Up to the present, the wave union method can achieve the best timing
performance in FPGA based TDC designs. However, it should be guaranteed in such
a structure that the non-thermometer code to binary code (NTH2B) encoding
process should be finished within just one system clock cycle. So the
implementation of the NTH2B encoder is quite challenging considering the high
speed requirement. Besides, the high resolution wave union TDC also demands the
encoder to convert an ultra-wide input code to a binary code. We present a fast
improved fat tree encoder (IFTE) to fulfill such requirements, in which bubble
error suppression is also integrated. With this encoder scheme, a wave union
TDC with 7.7 ps RMS and 3.8 ps effective bin size was implemented in an FPGA
from Xilinx Virtex 5 family. An encoding time of 8.33 ns was achieved for a
276-bit non-thermometer code to a 9-bit binary code conversion. We conducted a
series of tests on the oscillating period of the wave union launcher, as well
as the overall performance of the TDC; test results indicate that the IFTE
works well. In fact, in the implementation of this encoder, no manual routing
or special constrains were required; therefore, this IFTE structure could also
be further applied in other delay chain based FPGA TDCs.
