  Spins based in silicon provide one of the most promising architectures for
quantum computing. A scalable design for silicon-germanium quantum dot qubits
is presented. The design incorporates vertical and lateral tunneling.
Simulations of a four-qubit array suggest that the design will enable single
electron occupation of each dot of a many-dot array. Performing two-qubit
operations has negligible effect on other qubits in the array. Simulation
results are used to translate error correction requirements into specifications
for gate-voltage control electronics. This translation is a necessary link
between error correction theory and device physics.
