  Design of printed circuit board (PCB) stack-up requires the consideration of
characteristic impedance, insertion loss and crosstalk. As there are many
parameters in a PCB stack-up design, the optimization of these parameters needs
to be efficient and accurate. A less optimal stack-up would lead to expensive
PCB material choices in high speed designs. In this paper, an efficient global
optimization method using parallel and intelligent Bayesian optimization is
proposed for the stripline design.
