  Quantum computing is an emerging technology on the verge of reshaping
industries, while simultaneously challenging existing cryptographic algorithms.
FALCON, a recent standard quantum-resistant digital signature, presents a
challenging hardware implementation due to its extensive non-integer polynomial
operations, necessitating FFT over the ring $\mathbb{Q}[x]/(x^n+1)$. This paper
introduces an ultra-low power and compact processor tailored for FFT/IFFT
operations over the ring, specifically optimized for FALCON applications on
resource-constrained edge devices. The proposed processor incorporates various
optimization techniques, including twiddle factor compression and conflict-free
scheduling. In an ASIC implementation using a 22 nm GF process, the proposed
processor demonstrates an area occupancy of 0.15 mm$^2$ and a power consumption
of 12.6 mW at an operating frequency of 167 MHz. Since a hardware
implementation of FFT/IFFT over the ring is currently non-existent, the
execution time achieved by this processor is compared to the software
implementation of FFT/IFFT of FALCON on a Raspberry Pi 4 with Cortex-A72, where
the proposed processor achieves a speedup of up to 2.3$\times$. Furthermore, in
comparison to dedicated state-of-the-art hardware accelerators for classic FFT,
this processor occupies 42\% less area and consumes 83\% less power, on
average. This suggests that the proposed hardware design offers a promising
solution for implementing FALCON on resource-constrained devices.
