  Sparse linear system solvers are computationally expensive kernels that lie
at the heart of numerous applications. This paper proposes a flexible
preconditioning framework to substantially reduce the time and energy
requirements of this task by utilizing a hybrid architecture that combines
conventional digital microprocessors with analog crossbar array accelerators.
Our analysis and experiments with a simulator for analog hardware demonstrate
that an order of magnitude speedup is readily attainable without much impact on
convergence, despite the noise in analog computations.
