  Subthreshold circuit designs are very much popular for some of the ultra low
power applications, where the minimum energy consumption is the primary
concern. But, due to the weak driving current, these circuits generally suffer
from huge performance degradation. Therefore, in this paper, we primarily
targeted to analyze the performance of a Near-Threshold Circuit (NTC), which
retains the excellent energy efficiency of the subthreshold design, while
improving the performance to a certain extent. A modified row-based dual Vdd
4-operand CSA (Carry Save Adder) design has been reported in the present work
using 45 nm technology. Moreover, to find out the effectiveness of the
near-threshold operation of the 4-operand CSA design; it has been compared with
the other design styles. From the simulation results, obtained for the
frequency of 20 MHz, we found that the proposed scheme of CSA design consumes
3.009*10-7 Watt of Average Power (Pavg), which is almost 90.9 % lesser than
that of the conventional CSA design. Whereas, looking at the perspective of
maximum delay at output, the proposed scheme of CSA design provides a fair
44.37 % improvement, compared to that of the subthreshold CSA design.
