  We present an electron spin resonance (ESR) approach to characterize shallow
electron trapping in band-tail states at Si/SiO2 interfaces in
metal-oxide-semiconductor (MOS) devices and demonstrate it on two MOS devices
fabricated at different laboratories. Despite displaying similar low
temperature (4.2 K) peak mobilities, our ESR data reveal a significant
difference in the Si/SiO2 interface quality of these two devices, specifically
an order of magnitude difference in the number of shallow trapped charges at
the Si/SiO2 interfaces. Thus, our ESR method allows a quantitative evaluation
of the Si/SiO2 interface quality at low electron densities, where conventional
mobility measurements are not possible.
