  Performing data-intensive tasks in the von Neumann architecture is
challenging to achieve both high performance and power efficiency due to the
memory wall bottleneck. Computing-in-memory (CiM) is a promising mitigation
approach by enabling parallel in-situ multiply-accumulate (MAC) operations
within the memory with support from the peripheral interface and datapath.
SRAM-based charge-domain CiM (CD-CiM) has shown its potential of enhanced power
efficiency and computing accuracy. However, existing SRAM-based CD-CiM faces
scaling challenges to meet the throughput requirement of high-performance
multi-bit-quantization applications. This paper presents an SRAM-based
high-throughput ReLU-optimized CD-CiM macro. It is capable of completing MAC
and ReLU of two signed 8b vectors in one CiM cycle with only one A/D
conversion. Along with non-linearity compensation for the analog computing and
A/D conversion interfaces, this work achieves 51.2GOPS throughput and
10.3TOPS/W energy efficiency, while showing 88.6% accuracy in the CIFAR-10
dataset.
