  Scalability and performance of current flash memories can be improved
substantially by replacing the floating poly-Si gate by a layer of Si dots.
This multi-dot layer can be fabricated CMOS-compatibly in very thin gate oxide
by ion beam synthesis (IBS). Here, we present both experimental and theoretical
studies on IBS of multi-dot layers consisting of Si nanocrystals (NCs). The NCs
are produced by ultra low energy Si ion implantation, which causes a high Si
supersaturation in the shallow implantation region. During post-implantation
annealing, this supersaturation leads to phase separation of the excess Si from
the SiO2. Till now, the study of this phase separation process suffered from
the weak Z contrast between Si and SiO2 in Transmission Electron Microscopy
(TEM). Here, this imaging problem is resolved by mapping Si plasmon losses with
a Scanning Transmission Electron Microscopy equipped with a parallel Electron
Energy Loss Spectroscopy system (PEELS-STEM). Additionally, kinetic lattice
Monte Carlo simulations of Si phase separation have been performed and compared
with the experimental Si plasmon maps. It has been predicted theoretically that
the morphology of the multi-dot Si floating-gate changes with increasing ion
fluence from isolated, spherical NCs to percolated spinodal Si pattern. These
patterns agree remarkably with PEELS-STEM images. However, the predicted
fluence for spinodal patterns is lower than the experimental one. Because
oxidants of the ambient atmosphere penetrate into the as-implanted SiO2, a
substantial fraction of the implanted Si might be lost due to oxidation.
