  Time to Digital Converters (TDCs) are very common devices in particles
physics experiments. A lot of "off-the-shelf" TDCs can be employed but the
necessity of a custom DAta acQuisition (DAQ) system makes the TDCs implemented
on the Field-Programmable Gate Arrays (FPGAs) desirable. Most of the
architectures developed so far are based on the tapped delay lines with
precision down to 10 ps, obtained with high FPGA resources usage and
non-linearity issues to be managed. Often such precision is not necessary; in
this case TDC architectures with low resources occupancy are preferable
allowing the implementation of data processing systems and of other utilities
on the same device. In order to reconstruct gamma-gamma physics events tagged
with High Energy Tagger (HET) in the KLOE-2 (K LOng Experiment 2), we need to
measure the Time Of Flight (TOF) of the electrons and positrons from the KLOE-2
Interaction Point (IP) to our tagging stations (11 m apart). The required
resolution must be better than the bunch spacing (2.7 ns). We have developed
and implemented on a Xilinx Virtex-5 FPGA a 32 channel TDC with a precision of
255 ps and low non-linearity effects along with an embedded data acquisition
systems and the interface to the online FARM of KLOE-2.
