  We present a smart pixel prototype readout integrated circuit (ROIC) designed
in CMOS 28 nm bulk process, with in-pixel implementation of an artificial
intelligence (AI) / machine learning (ML) based data filtering algorithm
designed as proof-of-principle for a Phase III upgrade at the Large Hadron
Collider (LHC) pixel detector. The first version of the ROIC consists of two
matrices of 256 smart pixels, each 25$\times$25 $\mu$m$^2$ in size. Each pixel
consists of a charge-sensitive preamplifier with leakage current compensation
and three auto-zero comparators for a 2-bit flash-type ADC. The frontend is
capable of synchronously digitizing the sensor charge within 25 ns. Measurement
results show an equivalent noise charge (ENC) of $\sim$30e$^-$ and a total
dispersion of $\sim$100e$^-$ The second version of the ROIC uses a fully
connected two-layer neural network (NN) to process information from a cluster
of 256 pixels to determine if the pattern corresponds to highly desirable
high-momentum particle tracks for selection and readout. The digital NN is
embedded in-between analog signal processing regions of the 256 pixels without
increasing the pixel size and is implemented as fully combinatorial digital
logic to minimize power consumption and eliminate clock distribution, and is
active only in the presence of an input signal. The total power consumption of
the neural network is $\sim$ 300 $\mu$W. The NN performs momentum
classification based on the generated cluster patterns and even with a modest
momentum threshold, it is capable of 54.4\% - 75.4\% total data rejection,
opening the possibility of using the pixel information at 40MHz for the
trigger. The total power consumption of analog and digital functions per pixel
is $\sim$ 6 $\mu$W per pixel, which corresponds to $\sim$ 1 W/cm$^2$ staying
within the experimental constraints.
