  An 8 x 8 mixed-signal matrix multiplier architecture based on 64 hybrid
capacitor-resistor multiplying digital to analogue converters implemented in a
65 nm CMOS technology was developed for the application of blind source
separation of baseband RF signals. The integrated circuit has 13-bit resolution
for each matrix weight and achieves a measured dynamic range of > 62 dB with a
bandwidth of > 15 MHz and typical power dissipation of < 30 mW per matrix row.
Separation of single-tone signal is measured to be better than 57 dBc.
