  The discrete Fourier transform (DFT) is widely employed for multi-beam
digital beamforming. The DFT can be efficiently implemented through the use of
fast Fourier transform (FFT) algorithms, thus reducing chip area, power
consumption, processing time, and consumption of other hardware resources. This
paper proposes three new hybrid DFT 1024-point DFT approximations and their
respective fast algorithms. These approximate DFT (ADFT) algorithms have
significantly reduced circuit complexity and power consumption compared to
traditional FFT approaches while trading off a subtle loss in computational
precision which is acceptable for digital beamforming applications in RF
antenna implementations. ADFT algorithms have not been introduced for
beamforming beyond $N = 32$, but this paper anticipates the need for massively
large adaptive arrays for future 5G and 6G systems. Digital CMOS circuit
designs for the ADFTs show the resulting improvements in both circuit
complexity and power consumption metrics. Simulation results show similar or
lower critical path delay with up to 48.5% lower chip area compared to a
standard Cooley-Tukey FFT. The time-area and dynamic power metrics are reduced
up to 66.0%. The 1024-point ADFT beamformers produce signal-to-noise ratio
(SNR) gains between 29.2--30.1 dB, which is a loss of $\le$ 0.9 dB SNR gain
compared to exact 1024-point DFT beamformers (worst case) realizable at using
an FFT.
