  FPGAs excel in low power and high throughput computations, but they are
challenging to program. Traditionally, developers rely on hardware description
languages like Verilog or VHDL to specify the hardware behavior at the
register-transfer level. High-Level Synthesis (HLS) raises the level of
abstraction, but still requires FPGA design knowledge. Programmers usually
write pragma-annotated C/C++ programs to define the hardware architecture of an
application. However, each hardware vendor extends its own C dialect using its
own vendor-specific set of pragmas. This prevents portability across different
vendors. Furthermore, pragmas are not first-class citizens in the language.
This makes it hard to use them in a modular way or design proper abstractions.
In this paper, we present AnyHLS, an approach to synthesize FPGA designs in a
modular and abstract way. AnyHLS is able to raise the abstraction level of
existing HLS tools by resorting to programming language features such as types
and higher-order functions as follows: It relies on partial evaluation to
specialize and to optimize the user application based on a library of
abstractions. Then, vendor-specific HLS code is generated for Intel and Xilinx
FPGAs. Portability is obtained by avoiding any vendor-specific pragmas at the
source code. In order to validate achievable gains in productivity, a library
for the domain of image processing is introduced as a case study, and its
synthesis results are compared with several state-of-theart Domain-Specific
Language (DSL) approaches for this domain.
