  We propose a dynamic programming algorithm that constructs delay-optimized
circuits for alternating And-Or paths with prescribed input arrival times. Our
algorithm fulfills best-known approximation guarantees and empirically
outperforms earlier methods by exploring a significantly larger portion of the
solution space. Our algorithm is the core of a new timing optimization
framework that replaces critical paths of arbitrary length by logically
equivalent realizations with less delay. Our framework allows revising early
decisions on the logical structure of the netlist in a late step of an
industrial physical design flow. Experiments demonstrate the effectiveness of
our tool on 7nm real-world instances.
