  With the High Luminosity LHC upgrades, incorporating tracking information
into the CMS Level-1 trigger becomes necessary in order to maintain a
manageable trigger rate and good trigger performance e.g. to retain thresholds
for electroweak physics. The main challenges Level-1 track finding faces are
the large data throughput from the detector at a collision rate of 40 MHz and a
4 microsecond latency budget to reconstruct charged particle tracks with
sufficiently low transverse momentum to be used in the Level-1 trigger
decision. Dedicated all-FPGA hardware systems with time-multiplexed
architecture have been developed for track finding to address these challenges.
The algorithm and performance of the pattern recognition and particle
trajectory determination are discussed. The implementation on customized
electronics with commercially available FPGAs is presented as well.
