  In Near Memory Processing (NMP), processing elements(PEs) are placed near the
3D memory, reducing unnecessary data transfers between the CPU and the memory.
However, as the CPUs and the PEs of the NMP use a shared memory space,
maintaining coherency between them is a challenge. Most current literature
relies on maintaining coherence for fine-grained or coarse-grained instruction
granularities for the offloaded code blocks. We understand that for most
NMP-offloaded instructions, the coherence conflict is low, and waiting for the
coherence transaction hinders the performance. We construct an analytical model
for an existing coherence strategy called CONDA, which is within 4% accuracy.
This model indicates the key parameters responsible - the granularity of
offloaded code, probability of conflicts, transaction times, and commit time.
This paper identifies the prospective optimizations using the analytical model
for CONDA. It proposes a new coherence scheme called MRCN: Monitored Rollback
Coherence for NMP. MRCN addresses the coherence issue while eliminating
unnecessary re-executions with limited hardware overhead. The MRCN is evaluated
on synthetic as well as Rodinia benchmarks. The analytical results are within
4% accuracy of the simulation results. The MRCN shows improvement of upto 25%
over CONDA strategy for the same benchmark under different execution
conditions.
