  With the increased attention to memristive-based in-memory analog computing
(IMAC) architectures as an alternative for energy-hungry computer systems for
data-intensive applications, a tool that enables exploring their device- and
circuit-level design space can significantly boost the research and development
in this area. Thus, in this paper, we develop IMAC-Sim, a circuit-level
simulator for the design space exploration and multi-objective optimization of
IMAC architectures. IMAC-Sim is a Python-based simulation framework, which
creates the SPICE netlist of the IMAC circuit based on various device- and
circuit-level hyperparameters selected by the user, and automatically evaluates
the accuracy, power consumption and latency of the developed circuit using a
user-specified dataset. IMAC-Sim simulates the interconnect parasitic
resistance and capacitance in the IMAC architectures, and is also equipped with
horizontal and vertical partitioning techniques to surmount these reliability
challenges. In this abstract, we perform controlled experiments to exhibit some
of the important capabilities of the IMAC-Sim.
