  Various studies have shown the advantages of using Machine Learning (ML)
techniques for analog and digital IC design automation and optimization. Data
scarcity is still an issue for electronic designs, while training highly
accurate ML models. This work proposes generating and evaluating artificial
data using generative adversarial networks (GANs) for circuit data to aid and
improve the accuracy of ML models trained with a small training data set. The
training data is obtained by various simulations in the Cadence Virtuoso,
HSPICE, and Microcap design environment with TSMC 180nm and 22nm CMOS
technology nodes. The artificial data is generated and tested for an
appropriate set of analog and digital circuits. The experimental results show
that the proposed artificial data generation significantly improves ML models
and reduces the percentage error by more than 50\% of the original percentage
error, which were previously trained with insufficient data. Furthermore, this
research aims to contribute to the extensive application of AI/ML in the field
of VLSI design and technology by relieving the training data
availability-related challenges.
