  Magnetic skyrmions are promising for building next-generation magnetic
memories and spintronic devices due to their stability, small size and the
extremely low currents needed to move them. In particular, skyrmion-based
racetrack memory is attractive for information technology, where skyrmions are
used to store information as data bits instead of traditional domain walls.
Here we numerically demonstrate the impacts of skyrmion-skyrmion and
skyrmion-edge repulsions on the feasibility of skyrmion-based racetrack memory.
The reliable and practicable spacing between consecutive skyrmionic bits on the
racetrack as well as the ability to adjust it are investigated. Clogging of
skyrmionic bits is found at the end of the racetrack, leading to the reduction
of skyrmion size. Further, we demonstrate an effective and simple method to
avoid the clogging of skyrmionic bits, which ensures the elimination of
skyrmionic bits beyond the reading element. Our results give guidance for the
design and development of future skyrmion-based racetrack memory.
