  Numerous neural network circuits and architectures are presently under active
research for application to artificial intelligence and machine learning. Their
physical performance metrics (area, time, energy) are estimated. Various types
of neural networks (artificial, cellular, spiking, and oscillator) are
implemented with multiple CMOS and beyond-CMOS (spintronic, ferroelectric,
resistive memory) devices. A consistent and transparent methodology is proposed
and used to benchmark this comprehensive set of options across several
application cases. Promising architecture/device combinations are identified.
