  The spin of an electron confined in semiconductor quantum dots is currently a
promising candidate for quantum bit (qubit) implementations. Taking advantage
of existing CMOS integration technologies, such devices can offer a platform
for large scale quantum computation. However, a quantum mechanical framework
bridging a device's physical design and operational parameters to the qubit
energy space is lacking. Furthermore, the spin to charge coupling introduced by
intrinsic or induced Spin-Orbit-Interaction (SOI) exposes the qubits to charge
noise compromising their coherence properties and inducing quantum gate errors.
We present here a co-modelling framework for double quantum dot (DQD) devices
and their charge noise environment. We use a combination of an electrostatic
potential solver, full configuration interaction quantum mechanical methods and
two-level-fluctuator models to study the quantum gate performance in realistic
device designs and operation conditions. We utilize the developed models
together alongside the single electron solutions of the quantum dots to
simulate one- and two- qubit gates in the presence of charge noise. We find an
inverse correlation between quantum gate errors and quantum dot confinement
frequencies. We calculate X-gate fidelities >97% in the simulated Si-MOS
devices at a typical TLF densities. We also find that exchange driven two-qubit
SWAP gates show higher sensitivity to charge noise with fidelities down to 91%
in the presence of the same density of TLFs. We further investigate the one-
and two- qubit gate fidelities at different TLF densities. We find that given
the small size of the quantum dots, sensitivity of a quantum gate to the
distance between the noise sources and the quantum dot creates a strong
variability in the quantum gate fidelities which can compromise the device
yields in scaled qubit technologies.
