  Silicon spin qubits are among the most promising candidates for large scale
quantum computers, due to their excellent coherence and compatibility with CMOS
technology for upscaling. Advanced industrial CMOS process flows allow
wafer-scale uniformity and high device yield, but off the shelf transistor
processes cannot be directly transferred to qubit structures due to the
different designs and operation conditions. To therefore leverage the know-how
of the micro-electronics industry, we customize a 300mm wafer fabrication line
for silicon MOS qubit integration. With careful optimization and engineering of
the MOS gate stack, we report stable and uniform quantum dot operation at the
Si/SiOx interface at milli-Kelvin temperature. We extract the charge noise in
different devices and under various operation conditions, demonstrating a
record-low average noise level of 0.61 ${\mu}$eV/${\sqrt{Hz}}$ at 1 Hz and even
below 0.1 ${\mu}$eV/${\sqrt{Hz}}$ for some devices and operating conditions. By
statistical analysis of the charge noise with different operation and device
parameters, we show that the noise source can indeed be well described by a
two-level fluctuator model. This reproducible low noise level, in combination
with uniform operation of our quantum dots, marks CMOS manufactured MOS spin
qubits as a mature and highly scalable platform for high fidelity qubits.
