  Split manufacturing is a promising technique to defend against fab-based
malicious activities such as IP piracy, overbuilding, and insertion of hardware
Trojans. However, a network flow-based proximity attack, proposed by Wang et
al. (DAC'16) [1], has demonstrated that most prior art on split manufacturing
is highly vulnerable. Here in this work, we present two practical layout
techniques towards secure split manufacturing: (i) gate-level graph coloring
and (ii) clustering of same-type gates. Our approach shows promising results
against the advanced proximity attack, lowering its success rate by 5.27x,
3.19x, and 1.73x on average compared to the unprotected layouts when splitting
at metal layers M1, M2, and M3, respectively. Also, it largely outperforms
previous defense efforts; we observe on average 8x higher resilience when
compared to representative prior art. At the same time, extensive simulations
on ISCAS'85 and MCNC benchmarks reveal that our techniques incur an acceptable
layout overhead. Apart from this empirical study, we provide---for the first
time---a theoretical framework for quantifying the layout-level resilience
against any proximity-induced information leakage. Towards this end, we
leverage the notion of mutual information and provide extensive results to
validate our model.
