  This paper reports a novel approach that uses transistor aging in an
integrated circuit (IC) to detect hardware Trojans. When a transistor is aged,
it results in delays along several paths of the IC. This increase in delay
results in timing violations that reveal as timing errors at the output of the
IC during its operation. We present experiments using aging-aware standard cell
libraries to illustrate the usefulness of the technique in detecting hardware
Trojans. Combining IC aging with over-clocking produces a pattern of bit errors
at the IC output by the induced timing violations. We use machine learning to
learn the bit error distribution at the output of a clean IC. We differentiate
the divergence in the pattern of bit errors because of a Trojan in the IC from
this baseline distribution. We simulate the golden IC and show robustness to
IC-to-IC manufacturing variations. The approach is effective and can detect a
Trojan even if we place it far off the critical paths. Results on benchmarks
from the Trust-hub show a detection accuracy of $\geq$99%.
