  Ashenhurst-Curtis decomposition (ACD) is a decomposition technique used, in
particular, to map combinational logic into lookup tables (LUTs) structures
when synthesizing hardware designs. However, available implementations of ACD
suffer from excessive complexity, search-space restrictions, and slow run time,
which limit their applicability and scalability. This paper presents a novel
fast and versatile technique of ACD suitable for delay optimization. We use
this new formulation to compute two-level decompositions into a variable number
of LUTs and enhance delay-driven LUT mapping by performing ACD on the fly.
Compared to state-of-the-art technology mapping, experiments on heavily
optimized benchmarks demonstrate an average delay improvement of 12.39%, and
area reduction of 2.20% with affordable run time. Additionally, our method
improves 4 of the best delay results in the EPFL synthesis competition without
employing design-space exploration techniques.
