  Load-Dependent Branches (LDB) often do not exhibit regular patterns in their
local or global history and thus are inherently hard to predict correctly by
conventional branch predictors. We propose a software-to-hardware branch
pre-resolution mechanism that allows software to pass branch outcomes to the
processor frontend ahead of fetching the branch instruction. A compiler pass
identifies the instruction chain leading to the branch (the branch backslice)
and generates the pre-execute code that produces the branch outcomes ahead of
the frontend observing them. The loop structure helps to unambiguously map the
branch outcomes to their corresponding dynamic instances of the branch
instruction. Our approach also allows for covering the loop iteration space
selectively, with arbitrarily complex patterns. Our method for pre-execution
enables important optimizations such as unrolling and vectorization, in order
to substantially reduce the pre-execution overhead. Experimental results on
select workloads from SPEC CPU 2017 and graph analytics workloads show up to
95% reduction of MPKI (21% on average), up to 39% speedup (7% on average), and
up to 3x improvement on IPC (23% on average) compared to a core with
TAGE-SC-L-64KB branch predictor.
