  During the third long shutdown of the CERN Large Hadron Collider, the CMS
Detector will undergo a major upgrade to prepare for Phase-2 of the CMS physics
program, starting around 2026. The upgraded CMS detector will be read out at an
unprecedented data rate of up to 50 Tb/s with an event rate of 750 kHz,
selected by the level-1 hardware trigger, and an average event size of 7.4 MB.
Complete events will be analyzed by the High-Level Trigger (HLT) using software
algorithms running on standard processing nodes, potentially augmented with
hardware accelerators. Selected events will be stored permanently at a rate of
up to 7.5 kHz for offline processing and analysis. This paper presents the
baseline design of the DAQ and HLT systems for Phase-2, taking into account the
projected evolution of high speed network fabrics for event building and
distribution, and the anticipated performance of general purpose CPU. In
addition, some opportunities offered by reading out and processing parts of the
detector data at the full LHC bunch crossing rate (40 MHz) are discussed.
