  A generic and universal layer engineering strategy for van der Waals (vW)
materials, scalable and compatible with the current semiconductor technology is
of paramout importance in realizing all-two-dimensional logic circuits and move
beyond the silicon scaling limit. In this letter, we demonstrate a scalable and
highly controllable microwave plasma based layer engineering strategy for MoS2
and other vW materials. Using this technique we etch MoS2 flakes layer-by-layer
starting from arbitrary thickness and area down to the mono- or the few-layer
limit. From Raman spectroscopy, atomic force microscopy, photoluminescence
spectroscopy, scanning electron microscopy and transmission electron
microscopy, we confirm that the structural and morphological properties of the
material have not been compromised. The process preserves the pre-etch layer
topography and yields a smooth and pristine-like surface. We explore the
electrical properties utilising a field effect transistor geometry and find
that the mobility values of our samples are comparable to those of the pristine
ones. The layer removal does not involve any reactive gasses or chemical
reactions and relies on breaking the weak inter-layer vW interaction making it
a generic technique for a wide spectrum of layered materials and
heterostructures. We demonstrate the wide applicability of the technique by
extending it to other systems such as Graphene, h-BN and WSe2. In addition,
using the microwave plasma in combination with standard lithography, we
illustrate a lateral patterning scheme for device fabrication.
