  The era of widespread globalization has led to the emergence of
hardware-centric security threats throughout the IC supply chain. Prior
defenses like logic locking, layout camouflaging, and split manufacturing have
been researched extensively to protect against intellectual property (IP)
piracy at different stages. In this work, we present dynamic camouflaging as a
new technique to thwart IP reverse engineering at all stages in the supply
chain, viz., the foundry, the test facility, and the end-user. Toward this end,
we exploit the multi-functionality, post-fabrication reconfigurability, and
run-time polymorphism of spin-based devices, specifically the magneto-electric
spin-orbit (MESO) device. Leveraging these unique properties, dynamic
camouflaging is shown to be resilient against state-of-the-art analytical
SAT-based attacks and test-data mining attacks. Such dynamic reconfigurability
is not afforded in CMOS owing to fundamental differences in operation. For such
MESO-based camouflaging, we also anticipate massive savings in power,
performance, and area over other spin-based camouflaging schemes, due to the
energy-efficient electric-field driven reversal of the MESO device. Based on
thorough experimentation, we outline the promises of dynamic camouflaging in
securing the supply chain end-to-end along with a case study, demonstrating the
efficacy of dynamic camouflaging in securing error-tolerant image processing
IP.
