  Enhancement-mode Si/SiGe electron quantum dots have been pursued extensively
by many groups for \revEdit{their} potential in quantum computing. Most of the
reported dot designs utilize multiple metal-gate layers and use Si/SiGe
heterostructures with Ge concentration close to 30\%. Here we report the
fabrication and low-temperature characterization of quantum dots in
Si/Si$_{0.8}$Ge$_{0.2}$ heterostructures using only one metal-gate layer. We
find that the threshold voltage of a channel narrower than 1 $\mu$m increases
as the width decreases. The higher threshold can be attributed to the
combination of quantum confinement and disorder. We also find that the lower Ge
ratio used here leads to a narrower operational gate bias range. The higher
threshold combined with the limited gate bias range constrains the device
design of lithographic quantum dots. We incorporate such considerations in our
device design and demonstrate a quantum dot that can be tuned from a single dot
to a double dot. The device uses only a single metal-gate layer, greatly
simplifying device design and fabrication.
