  Quantum Error Correction requires decoders to process syndromes generated by
the error-correction circuits. These decoders must process syndromes faster
than they are being generated to prevent a backlog of undecoded syndromes that
can exponentially increase the memory and time required to execute the program.
This has resulted in the development of fast hardware decoders that accelerate
decoding. Applications utilizing error-corrected quantum computers will require
hundreds to thousands of logical qubits and provisioning a hardware decoder for
every logical qubit can be very costly. In this work, we present a framework to
reduce the number of hardware decoders and navigate the compute-memory
trade-offs without sacrificing the performance or reliability of program
execution. Through workload-centric characterizations, we propose efficient
decoder scheduling policies which can reduce the number of hardware decoders
required to run a program by up to 10x while consuming less than 100 MB of
memory.
