  The pressing demands of improving energy efficiency for high performance
scientific computing have motivated a large body of software-controlled hard-
ware solutions using Dynamic Voltage and Frequency Scaling (DVFS) that
strategically switch processors to low-power states, when the peak processor
performance is not necessary. Although OS level solutions have demonstrated the
effectiveness of saving energy in a black-box fashion, for applications with
variable execution characteristics, the optimal energy efficiency can be
blundered away due to defective prediction mechanism and untapped load
imbalance. In this paper, we propose TX, a library level race-to-halt DVFS
scheduling approach that analyzes Task Dependency Set of each task in parallel
Cholesky, LU, and QR factorizations to achieve substantial energy savings OS
level solutions cannot fulfill. Partially giving up the generality of OS level
solutions per requiring library level source modification, TX lever- ages
algorithmic characteristics of the applications to gain greater energy savings.
Experimental results on two power-aware clusters indicate that TX can save up
to 17.8% more energy than state-of-the-art OS level solutions with negligible
3.5% on average performance loss.
