  This paper presents a novel IP design for real-time fault/error detection and
recovery on a peripheral component interconnect express (PCIe) which interfaces
a host system (here a PC) to a slave design including processing system and
memory transaction implemented on a Zynq Ultrascale Xilinx Kintex FPGA board
(KCU105). The proposed IP design is capable of detection and correction of
different types of PCIe errors on-the-fly
