  The proposed Circular Electron Positron Collider (CEPC) imposes new
challenges for the vertex detector in terms of high resolution, low material,
fast readout and low power. The Monolithic Active Pixel Sensor (MAPS)
technology has been chosen as one of the most promising candidates to satisfy
these requirements. A MAPS prototype, called TaichuPix1, based on a data-driven
structure, together with a column drain readout architecture, benefiting from
the ALPIDE and FE-I3 approaches, has been implemented to achieve fast readout.
This paper presents the overall architecture of TaichuPix1, the experimental
characterization of the FE-I3-like matrix, the threshold dispersion, the noise
distribution of the pixels and verifies the charge collection using a
radioactive source. These results prove the functionality of the digital
periphery and serializer are able to transmit the collected charge to the data
interface correctly. Moreover, the individual self-tests of the serializer
verify it can work up to about 3 Gbps. And it also indicates that the analog
front-end features a fast-rising signal with a short time walk and that the
FE-I3-like in-pixel digital logic is properly operating at the 40 MHz system
clock.
