  Silicon Photomultipliers (SiPMs) are photon-counting detectors with great
potential to improve the sensitivity of optical receivers. Recent studies of
SiPMs in communication focus on the speed rather than the power consumption of
the receiver. The gain bandwidth product (GBP) of the amplifiers in these
post-SiPM readout circuits is significantly higher than the target data rate.
Additionally, the SiPM experiments for optical communication are performed
using an offline method which uses instruments including oscilloscopes and
personal computers to process chunks of the transmitted data. In this work, we
have developed an embedded real-time field-programmable gate array (FPGA) based
system to evaluate a commercially available 1 mm-sq SiPM. The implemented
real-time system achieves data rates from 10 kbps to 1 Mbps with a bit error
rate (BER) below 1E-3 approaching the Poisson limit. Results showed that
reducing either the dark count rate or increasing the data rate leads to lower
dark counts per bit time, hence less power penalty to maintain a probability of
error (PE) of 1E-3. The numerically simulated results indicated that to
maintain the Poisson limit, the minimum GBP of the amplifier in the post-SiPM
readout circuit is 120 MHz based on the proposed setup within the tested data
rates. This GBP limitation is determined by the noise floor of the read-out
circuit. The analysis of the minimum GBP and electrical power consumption of
the receiver in photon counting and BER enables the potential future adoption
of this receiver technology when high optical sensitivity is required, such as
visible light communications (VLC) for low data rate Internet of Things (IoT)
applications.
