  As the size of quantum systems becomes bigger, more complicated hardware is
required to control these systems. In order to reduce the complexity, I discuss
the amount of parallelism required for a fault-tolerant quantum computer and
what computation speed can be achieved in different architectures. To build a
large-scale quantum computer, one can use architectural principles, from
classical computer architecture, like multiplexing or pipelining. In this
document, a Quantum von Neumann architecture is introduced which uses
specialized hardware for the different tasks of a quantum computer, like
computation or storage. Furthermore, it requires long qubit coherence and the
capability to move quantum information between the different parts of the
quantum computer. As an example, a Quantum von Neumann architecture for trapped
ions is presented which incorporates multiplexing in the memory region for
large-scale quantum computation. To illustrate the capability of this
architecture, a model trapped ion quantum computer based on Quantum von Neumann
architecture, the Quantum 4004, is introduced. Its hardware is optimized for
simplicity and uses the classical Intel 4004 CPU from 1971 as a blueprint. The
Quantum 4004 has only a single processing zone and is structured in 4 qubit
packages. Its quantum memory can store up to 32768 qubit ions and its
computation speed is 10 $\mu$s for single qubit operations and 20 $\mu$s for
two-qubit operations.
