  In this paper, we propose EasyBO, an Efficient ASYnchronous Batch Bayesian
Optimization approach for analog circuit synthesis. In this proposed approach,
instead of waiting for the slowest simulations in the batch to finish, we
accelerate the optimization procedure by asynchronously issuing the next query
points whenever there is an idle worker. We introduce a new acquisition
function that can better explore the design space for asynchronous batch
Bayesian optimization. A new strategy is proposed to better balance the
exploration and exploitation and guarantee the diversity of the query points.
And a penalization scheme is proposed to further avoid redundant queries during
the asynchronous batch optimization. The efficiency of optimization can thus be
further improved. Compared with the state-of-the-art batch Bayesian
optimization algorithm, EasyBO achieves up to 7.35 times speed-up without
sacrificing the optimization results.
