  Memristor-aided logic (MAGIC) design style holds a high promise for realizing
digital logic-in-memory functionality. The ability to implement a specific gate
in a MAGIC design style hinges on the SET-to-RESET threshold ratio. The TaOx
memristive devices exhibit distinct SET-to-RESET ratios, enabling the
implementation of OR and NOT operations. As the adoption of the MAGIC design
style gains momentum, it becomes crucial to understand the breakdown of energy
consumption in the various phases of its operation. This paper presents
experimental demonstrations of the OR and NOT gates on a 1T1R crossbar array.
Additionally, it provides insights into the energy distribution for performing
these operations at different stages. Through our experiments across different
gates, we found that the energy consumption is dominated by initialization in
the MAGIC design style. The energy split-up is 14.8%, 85%, and 0.2% for
execution, initialization, and read operations respectively.
