  Using OpenCL-based high-level synthesis, we create a number of spiking neural
network (SNN) simulators for the Potjans-Diesmann cortical microcircuit for a
high-end Field-Programmable Gate Array (FPGA). Our best simulators simulate the
circuit 25\% faster than real-time, require less than 21 nJ per synaptic event,
and are bottle-necked by the device's on-chip memory. Speed-wise they compare
favorably to the state-of-the-art GPU-based simulators and their energy usage
is lower than any other published result. This result is the first for
simulating the circuit on a single hardware accelerator. We also extensively
analyze the techniques and algorithms we implement our simulators with, many of
which can be realized on other types of hardware. Thus, this article is of
interest to any researcher or practitioner interested in efficient SNN
simulation, whether they target FPGAs or not.
