  Inductance of superconducting thin-film inductors and structures with
linewidth down to 250 nm has been experimentally evaluated. The inductors
include various striplines and microstrips, their 90-degree bends and meanders,
interlayer vias, etc., typically used in superconducting digital circuits. The
circuits have been fabricated by a fully planarized process with 8 niobium
layers, developed at MIT Lincoln Laboratory for very-large-scale
superconducting integrated circuits. Excellent run-to-run reproducibility and
inductance uniformity of better than 1% across 200-mm wafers have been found.
It has been found that the inductance per unit length of stripline and
microstrip line inductors continues to grow as the inductor linewidth is
reduced deep into the submicron range to the widths comparable to the film
thickness and magnetic field penetration depth. It is shown that the linewidth
reduction does not lead to widening of the parameter spread due to diminishing
sensitivity of the inductance to the linewidth and dielectric thickness. The
experimental results were compared with numeric inductance extraction using
commercial software and freeware, and a good agreement was found for 3-D
inductance extractors. Methods of further miniaturization of circuit inductors
for achieving circuit densities > 10^6 Josephson junctions per cm^2 are
discussed.
