  For the purpose of developing applications for Post-K at an early stage,
RIKEN has developed a post-K processor simulator. This simulator is based on
the general-purpose processor simulator gem5. It does not simulate the actual
hardware of a post-K processor. However, we believe that sufficient simulation
accuracy can be obtained since it simulates the instruction pipeline of
out-of-order execution with cycle-level accuracy along with performing detailed
parameter tuning of out-of-order resources and function expansion of
cache/memory hierarchy. In this simulator, we aim to estimate the execution
cycles of one node application on a post-K processor with accuracy that enables
relative evaluation and application tuning. In this paper, we show the details
of the implementation of this simulator and verify its accuracy compared with
that of a post-K test chip.
