  Massive multiple-input multiple-output (M-MIMO) is an enabling technology of
5G wireless communication. The performance of an M-MIMO system is highly
dependent on the speed and accuracy of obtaining the channel state information
(CSI). The computational complexity of channel estimation for an M-MIMO system
can be reduced by making use of the sparsity of the M-MIMO channel. In this
paper, we propose the hardware-efficient channel estimator based on
angle-division multiple access (ADMA) for the first time. Preamble, uplink (UL)
and downlink (DL) training are also implemented. For further
hardware-efficiency consideration, optimization regarding quantization and
approximation strategies have been discussed. Implementation techniques such as
pipelining and systolic processing are also employed for hardware regularity.
Numerical results and FPGA implementation have demonstrated the advantages of
the proposed channel estimator.
