  While magnetic solid-state memory has found commercial applications to date,
magnetic logic has rather remained on a conceptual level so far. Here, we
discuss open challenges of different spintronic logic approaches, which use
magnetic excitations for computation. While different logic gate designs have
been proposed and proof of concept experiments have been reported, no
nontrivial operational spintronic circuit has been demonstrated due to many
open challenges in spintronic circuit and system design. Furthermore, the
integration of spintronic circuits in CMOS systems will require the usage of
transducers between the electric (CMOS) and magnetic domains. We show that
these transducers can limit the performance as well as the energy consumption
of hybrid CMOS-spintronic systems. Hence, the optimization of transducer
efficiency will be a major step towards competitive spintronic logic system.
