  Low-resolution analog-to-digital converters (ADCs) in massive multi-user (MU)
multiple-input multiple-output (MIMO) wireless systems can significantly reduce
the power, cost, and interconnect data rates of infrastructure basestations.
Thus, recent research on the theory and algorithm sides has extensively focused
on such architectures, but with idealistic quantization models. However,
real-world ADCs do not behave like ideal quantizers, and are affected by
fabrication mismatches. We analyze the impact of capacitor-array mismatches in
successive approximation register (SAR) ADCs, which are widely used in wireless
systems. We use Bussgang's decomposition to model the effects of such
mismatches, and we analyze their impact on the performance of a single ADC. We
then simulate a massive MU-MIMO system to demonstrate that capacitor mismatches
should not be ignored, even in basestations that use low-resolution SAR ADCs.
