  OpenCL for FPGA enables developers to design FPGAs using a programming model
similar for processors. Recent works have shown that code optimization at the
OpenCL level is important to achieve high computational efficiency. However,
existing works either focus primarily on optimizing single kernels or solely
depend on channels to design multi-kernel pipelines. In this paper, we propose
a source-to-source compiler framework, MKPipe, for optimizing multi-kernel
workloads in OpenCL for FPGA. Besides channels, we propose new schemes to
enable multi-kernel pipelines. Our optimizing compiler employs a systematic
approach to explore the tradeoffs of these optimizations methods. To enable
more efficient overlapping between kernel execution, we also propose a novel
workitem/workgroup-id remapping technique. Furthermore, we propose new
algorithms for throughput balancing and resource balancing to tune the
optimizations upon individual kernels in the multi-kernel workloads. Our
results show that our compiler-optimized multi-kernels achieve up to 3.6x (1.4x
on average) speedup over the baseline, in which the kernels have already been
optimized individually.
