  We present a new circuit for non-Boolean recognition of binary images.
Employing all-spin logic (ASL) devices, we design logic comparators and
non-Boolean decision blocks for compact and efficient computation. By
manipulation of fan-in number in different stages of the circuit, the structure
can be extended for larger training sets or larger images. Operating based on
the mainly similarity idea, the system is capable of constructing a mean image
and compare it with a separate input image within a short decision time. Taking
advantage of the non-volatility of ASL devices, the proposed circuit is capable
of hybrid memory/logic operation. Compared with existing CMOS pattern
recognition circuits, this work achieves a smaller footprint, lower power
consumption, faster decision time and a lower operational voltage. To the best
of our knowledge, this is the first fully spin-based complete pattern
recognition circuit demonstrated using spintronic devices.
