  Radiation tolerant, high speed and low power serializer ASIC is critical for
optical link systems in particle physics experiments. Based on a commercial
0.25 um silicon-on-sapphire CMOS technology, we design a 16:1 serializer with 5
Gbps serial data rate. This ASIC has been submitted for fabrication. The
post-layout simulation indicates the deterministic jitter is 54 ps (pk-pk) and
random jitter is 3 ps (rms). The power consumption of the serializer is 500 mW.
The design details and post layout simulation results are presented in this
paper.
