  We present measurements of silicon (Si) metal-oxide-semiconductor (MOS)
nanostructures that are fabricated using a process that facilitates essentially
arbitrary gate geometries. Stable Coulomb blockade behavior free from the
effects of parasitic dot formation is exhibited in several MOS quantum dots
with an open lateral quantum dot geometry. Decreases in mobility and increases
in charge defect densities (i.e. interface traps and fixed oxide charge) are
measured for critical process steps, and we correlate low disorder behavior
with a quantitative defect density. This work provides quantitative guidance
that has not been previously established about defect densities for which Si
quantum dots do not exhibit parasitic dot formation. These devices make use of
a double-layer gate stack in which many regions, including the critical gate
oxide, were fabricated in a fully-qualified CMOS facility.
