  We present a general strategy for mapping fermionic systems to quantum
hardware with square qubit connectivity which yields low-depth quantum
circuits, counted in the number of native two-qubit fSIM gates. We achieve this
by leveraging novel operator decomposition and circuit compression techniques
paired with specifically chosen low-depth fermion-to-qubit mappings and allow
for a high degree of gate cancellations and parallelism. Our mappings retain
the flexibility to simultaneously optimize for qubit counts or qubit operator
weights and can be used to investigate arbitrary fermionic lattice geometries.
We showcase our approach by investigating the tight-binding model, the
Fermi-Hubbard model as well as the multi-orbital Hubbard-Kanamori model. We
report unprecedentedly low circuit depths per single Trotter layer with up to a
$70 \%$ improvement upon previous state-of-the-art. Our compression technique
also results in significant reduction of two-qubit gates. We find the lowest
gate-counts when applying the XYZ-formalism to the DK mapping. Additionally, we
show that our decomposition and compression formalism produces favourable
circuits even when no native parameterized two-qubit gates are available.
