  We present the first study of the intrinsic electrical properties of WS$_2$
transistors fabricated with two different dielectric environments WS$_2$ on
SiO$_2$ and WS$_2$ on h-BN/SiO$_2$, respectively. A comparative analysis of the
electrical characteristics of multiple transistors fabricated from natural and
synthetic WS$_2$ with various thicknesses from single- up to four-layers and
over a wide temperature range from 300K down to 4.2 K shows that disorder
intrinsic to WS$_2$ is currently the limiting factor of the electrical
properties of this material. These results shed light on the role played by
extrinsic factors such as charge traps in the oxide dielectric thought to be
the cause for the commonly observed small values of charge carrier mobility in
transition metal dichalcogenides.
