  Computing-in-Memory (CiM) architectures aim to reduce costly data transfers
by performing arithmetic and logic operations in memory and hence relieve the
pressure due to the memory wall. However, determining whether a given workload
can really benefit from CiM, which memory hierarchy and what device technology
should be adopted by a CiM architecture requires in-depth study that is not
only time consuming but also demands significant expertise in architectures and
compilers. This paper presents an energy evaluation framework, Eva-CiM, for
systems based on CiM architectures. Eva-CiM encompasses a multi-level (from
device to architecture) comprehensive tool chain by leveraging existing
modeling and simulation tools such as GEM5, McPAT [2] and DESTINY [3]. To
support high-confidence prediction, rapid design space exploration and ease of
use, Eva-CiM introduces several novel modeling/analysis approaches including
models for capturing memory access and dependency-aware ISA traces, and for
quantifying interactions between the host CPU and CiM modules. Eva-CiM can
readily produce energy estimates of the entire system for a given program, a
processor architecture, and the CiM array and technology specifications.
Eva-CiM is validated by comparing with DESTINY [3] and [4], and enables
findings including practical contributions from CiM-supported accesses,
CiM-sensitive benchmarking as well as the pros and cons of increased memory
size for CiM. Eva-CiM also enables exploration over different configurations
and device technologies, showing 1.3-6.0X energy improvement for SRAM and
2.0-7.9X for FeFET-RAM, respectively.
