  Approximate computing (AC) has become a prominent solution to improve the
performance, area, and power/energy efficiency of a digital design at the cost
of output accuracy. We propose a novel scalable approximate multiplier that
utilizes a lookup table-based compensation unit. To improve energy-efficiency,
input operands are truncated to a reduced bitwidth representation (e.g., h
bits) based on their leading one positions. Then, a curve-fitting method is
employed to map the product term to a linear function, and a piecewise constant
error-correction term is used to reduce the approximation error. For computing
the piecewise constant error-compensation term, we partition the function space
into M segments and compute the compensation factor for each segment by
averaging the errors in the segment. The multiplier supports various degrees of
truncation and error-compensation to exploit accuracy-efficiency trade-off. The
proposed approximate multiplier offers better error metrics such as mean and
standard deviation of absolute relative error (MARED and StdARED) compare to a
state-of-the-art integer approximate multiplier. The proposed approximate
multiplier improves the MARED and StdARED by about 38% and 32% when its energy
consumption is about equal to the state-of-the-art approximate multiplier.
Moreover, the performance of the proposed approximate multiplier is evaluated
in image classification applications using a Deep Neural Network (DNN). The
results indicate that the degradation of DNN accuracy is negligible especially
due to the compensation properties of our approximate multiplier.
