  DRAM is the dominant main memory technology used in modern computing systems.
Computing systems implement a memory controller that interfaces with DRAM via
DRAM commands. DRAM executes the given commands using internal components
(e.g., access transistors, sense amplifiers) that are orchestrated by DRAM
internal timings, which are fixed foreach DRAM command. Unfortunately, the use
of fixed internal timings limits the types of operations that DRAM can perform
and hinders the implementation of new functionalities and custom mechanisms
that improve DRAM reliability, performance and energy. To overcome these
limitations, we propose enabling programmable DRAM internal timings for
controlling in-DRAM components. To this end, we design CODIC, a new low-cost
DRAM substrate that enables fine-grained control over four previously fixed
internal DRAM timings that are key to many DRAM operations. We implement CODIC
with only minimal changes to the DRAM chip and the DDRx interface. To
demonstrate the potential of CODIC, we propose two new CODIC-based security
mechanisms that outperform state-of-the-art mechanisms in several ways: (1) a
new DRAM Physical Unclonable Function (PUF) that is more robust and has
significantly higher throughput than state-of-the-art DRAM PUFs, and (2) the
first cold boot attack prevention mechanism that does not introduce any
performance or energy overheads at runtime.
