  The SpMV kernel is characterized by high performance variation per input
matrix and computing platform. While GPUs were considered State-of-the-Art for
SpMV, with the emergence of advanced multicore CPUs and low-power FPGA
accelerators, we need to revisit its performance and energy efficiency. This
paper provides a high-level SpMV performance analysis based on structural
features of matrices related to common bottlenecks of memory-bandwidth
intensity, low ILP, load imbalance and memory latency overheads. Towards this,
we create a wide artificial matrix dataset that spans these features and study
the performance of different storage formats in nine modern HPC platforms; five
CPUs, three GPUs and an FPGA. After validating our proposed methodology using
real-world matrices, we analyze our extensive experimental results and draw key
insights on the competitiveness of different target architectures for SpMV and
the impact of each feature/bottleneck on its performance.
