  Motivation: Read mapping is a computationally expensive process and a major
bottleneck in genomics analyses. The performance of read mapping is mainly
limited by the performance of three key computational steps: Index Querying,
Seed Chaining, and Sequence Alignment. The first step is dominated by how fast
and frequent it accesses the main memory (i.e., memory-bound), while the latter
two steps are dominated by how fast the CPU can compute their
computationally-costly dynamic programming algorithms (i.e., compute-bound).
Accelerating these three steps by exploiting new algorithms and new hardware
devices is essential to accelerate most genome analysis pipelines that widely
use read mapping. Given the large body of work on accelerating Sequence
Alignment, this work focuses on significantly improving the remaining steps.
Results: We introduce GateSeeder, the first CPU-FPGA-based near-memory
acceleration of both short and long read mapping. GateSeeder exploits
near-memory computation capability provided by modern FPGAs that couple a
reconfigurable compute fabric with high-bandwidth memory (HBM) to overcome the
memory-bound and compute-bound bottlenecks. GateSeeder also introduces a new
lightweight algorithm for finding the potential matching segment pairs. Using
real ONT, HiFi, and Illumina sequences, we experimentally demonstrate that
GateSeeder outperforms Minimap2, without performing sequence alignment, by up
to 40.3x, 4.8x, and 2.3x, respectively. When performing read mapping with
sequence alignment, GateSeeder outperforms Minimap2 by 1.15-4.33x (using KSW2)
and by 1.97-13.63x (using WFA-GPU). Availability:
https://github.com/CMU-SAFARI/GateSeeder
