  We consider realistic, multi-parameter error models and investigate the
performance of the surface code for three possible fault-tolerant
superconducting quantum computer architectures. We map amplitude and phase
damping to a diagonal Pauli "depolarization" channel via the Pauli twirl
approximation, and obtain the logical error rate as a function of the qubit T1,
T2 and state preparation, gate, and readout errors. A numerical Monte Carlo
simulation is performed to obtain the logical error rates and a leading-order
analytic formula is derived to estimate their behavior below threshold. Our
results suggest that scalable fault-tolerant quantum computation should be
possible with existing superconducting devices.
