  Embedded peripheral devices such as memories, sensors and communications
interfaces are used to perform a function external to a host microcontroller.
The device manufacturer typically specifies worst-case current consumption and
latency estimates for each of these peripheral actions. Peripheral Activity
Completion, Estimation and Recognition (PACER) is introduced as a suite of
algorithms that can be applied to detect completed peripheral operations in
real-time. By detecting activity completion, PACER enables the host to exploit
slack between the worst-case estimate and the actual response time. These
methods were tested independently and in conjunction with IODVS on multiple
common peripheral devices. For the peripheral devices under test, the test
fixture confirmed decreases in energy expenditures of up to 80% and latency
reductions of up to 67%.
