  Rank and select are fundamental operations in succinct data structures, that
is, data structures whose space consumption approaches the
information-theoretic optimal. The performance of these primitives is central
to the overall performance of succinct data structures.
  Traditionally, the select operation is the harder to implement efficiently,
and most prior implementations of select on machine words use 50--80 machine
instructions. (In contrast, rank on machine words can be implemented in only a
handful of instructions on machines that support POPCOUNT.) However, recently
Pandey et al. gave a new implementation of machine-word select that uses only
four x86 machine instructions; two of which were introduced in Intel's Haswell
CPUs.
  In this paper, we investigate the impact of this new implementation of
machine-word select on the performance of general bit-vector-select. We first
compare Pandey et al.'s machine-word select to the state-of-the-art
implementations of Zhou et al. (which is not specific to Haswell) and Gog et
al. (which uses some Haswell-specific instructions). We exhibit a speedup of 2X
to 4X.
  We then study the impact of plugging Pandey et al.'s machine-word select into
two state-of-the-art bit-vector-select implementations. Both Zhou et al.'s and
Gog et al.'s select implementations perform a single machine-word select
operation for each bit-vector select. We replaced the machine-word select with
the new implementation and compared performance. Even though there is only a
single machine- word select operation, we still obtained speedups of 20% to
68%. We found that the new select not only reduced the number of instructions
required for each bit-vector select, but also improved CPU instruction cache
performance and memory-access parallelism.
