  The ExaNeSt and EuroExa H2020 EU-funded projects aim to design and develop an
exascale ready computing platform prototype based on low-energy-consumption
ARM64 cores and FPGA accelerators. We participate in the application-driven
design of the hardware solutions and prototype validation. To carry on this
work we are using, among others, Hy-Nbody, a state-of-the-art direct N-body
code. Core algorithms of Hy-Nbody have been improved in such a way to
increasingly fit them to the exascale target platform. Waiting for the ExaNest
prototype release, we are performing tests and code tuning operations on an
ARM64 SoC facility: a SLURM managed HPC cluster based on 64-bit ARMv8
Cortex-A72/Cortex-A53 core design and powered by a Mali-T864 embedded GPU. In
parallel, we are porting a kernel of Hy-Nbody on FPGA aiming to test and
compare the performance-per-watt of our algorithms on different platforms. In
this paper we describe how we re-engineered the application and we show first
results on ARM SoC.
