  The traditional SerDes link simulation process begins with the extraction of
printed circuit board (PCB) physical stripline and via models, followed by
channel modeling and link simulation. We invert this simulation flow by first
creating link performance curves across an array of hypothetical channels
defined with specially-developed, high level, equation-based models; limited
physical extraction is later undertaken to relate PCB channel implementation to
these performance curves. These curves allow us to determine the system-level
SerDes channel requirements and to become better informed in choosing PCB
technologies for lower cost and easier manufacturability. The inverted modeling
process is very efficient, allowing for the rapid identification and avoidance
of problematic channel topologies and the study of other potentially useful
channel designs.
