  Ambipolar dual-gate transistors based on two-dimensional (2D) materials, such
as graphene, carbon nanotubes, black phosphorus, and certain transition metal
dichalcogenides (TMDs), enable reconfigurable logic circuits with suppressed
off-state current. These circuits achieve the same logical output as CMOS with
fewer transistors and offer greater flexibility in design. The primary
challenge lies in the cascadability and power consumption of these logic gates
with static CMOS-like connections. In this article, high-performance ambipolar
dual-gate transistors based on tungsten diselenide (WSe2) are fabricated. A
high on-off ratio of 10^8 and 10^6, a low off-state current of 100 to 300 fA, a
negligible hysteresis, and an ideal subthreshold swing of 62 and 63 mV/dec are
measured in the p- and n-type transport, respectively. For the first time, we
demonstrate cascadable and cascaded logic gates using ambipolar TMD transistors
with minimal static power consumption, including inverters, XOR, NAND, NOR, and
buffers made by cascaded inverters. A thorough study of both the control gate
and polarity gate behavior is conducted, which has previously been lacking. The
noise margin of the logic gates is measured and analyzed. The large noise
margin enables the implementation of VT-drop circuits, a type of logic with
reduced transistor number and simplified circuit design. Finally, the speed
performance of the VT-drop and other circuits built by dual-gate devices are
qualitatively analyzed. This work lays the foundation for future developments
in the field of ambipolar dual-gate TMD transistors, showing their potential
for low-power, high-speed and more flexible logic circuits.
