  Experimental results from a 65 nm CMOS commercial technology SRAM test chip
reveal a linear correlation between a new electrical parameter -- the word-line
voltage margin (VWLVM) -- and the measured circuit alpha-SER. Additional
experiments show that no other memory cell electrical robustness-related
parameters exhibit such correlation. The technique proposed is based on
correlating the VWLVM to the SER measured on a small number of circuit samples
to determine the correlation parameters. Then, the remaining non-irradiated
circuits SER is determined from electrical measurements (VWLVM) without the
need of additional radiation experiments. This method represents a significant
improvement in time and cost, while simplifying the SER-determination methods
since most of the circuits do not require irradiation. The technique involves a
minor memory design modification that does not degrade circuit performance,
while circuit area increase is negligible.
