  ALIGN ("Analog Layout, Intelligently Generated from Netlists") is an
open-source automatic layout generation flow for analog circuits. ALIGN
translates an input SPICE netlist to an output GDSII layout, specific to a
given technology, as specified by a set of design rules. The flow first
automatically detects hierarchies in the circuit netlist and translates layout
synthesis to a problem of hierarchical block assembly. At the lowest level,
parameterized cells are generated using an abstraction of the design rules;
these blocks are then assembled under geometric and electrical constraints to
build the circuit layout. ALIGN has been applied to generate layouts for a
diverse set of analog circuit families: low frequency analog blocks, wireline
circuits, wireless circuits, and power delivery circuits.
