  We present a comprehensive architectural analysis for a proposed
fault-tolerant quantum computer based on cat codes concatenated with outer
quantum error-correcting codes. For the physical hardware, we propose a system
of acoustic resonators coupled to superconducting circuits with a
two-dimensional layout. Using estimated physical parameters for the hardware,
we perform a detailed error analysis of measurements and gates, including CNOT
and Toffoli gates. Having built a realistic noise model, we numerically
simulate quantum error correction when the outer code is either a repetition
code or a thin rectangular surface code. Our next step toward universal
fault-tolerant quantum computation is a protocol for fault-tolerant Toffoli
magic state preparation that significantly improves upon the fidelity of
physical Toffoli gates at very low qubit cost. To achieve even lower overheads,
we devise a new magic-state distillation protocol for Toffoli states. Combining
these results together, we obtain realistic full-resource estimates of the
physical error rates and overheads needed to run useful fault-tolerant quantum
algorithms. We find that with around 1,000 superconducting circuit components,
one could construct a fault-tolerant quantum computer that can run circuits
which are currently intractable for classical computers. Hardware with 18,000
superconducting circuit components, in turn, could simulate the Hubbard model
in a regime beyond the reach of classical computing.
