  Approximate computing is an emerging paradigm to improve the power and
performance efficiency of error-resilient applications. As adders are one of
the key components in almost all processing systems, a significant amount of
research has been carried out towards designing approximate adders that can
offer better efficiency than conventional designs, however, at the cost of some
accuracy loss. In this paper, we highlight a new class of energy-efficient
approximate adders, namely Heterogeneous Block-based Approximate Adders (HBAA),
and propose a generic configurable adder model that can be configured to
represent a particular HBAA configuration. An HBAA, in general, is composed of
heterogeneous sub-adder blocks of equal length, where each sub-adder can be an
approximate sub-adder and have a different configuration. The sub-adders are
mainly approximated through inexact logic and carry truncation. Compared to the
existing design space, HBAAs provide additional design points that fall on the
Pareto-front and offer a better quality-efficiency trade-off in certain
scenarios. Furthermore, to enable efficient design space exploration based on
user-defined constraints, we propose an analytical model to efficiently
evaluate the Probability Mass Function (PMF) of approximation error and other
error metrics, such as Mean Error Distance (MED), Normalized Mean Error
Distance (NMED) and Error Rate (ER) of HBAAs. The results show that HBAA
configurations can provide around 15% reduction in area and up to 17% reduction
in energy compared to state-of-the-art approximate adders.
