  During the past decade, Deep Learning (DL) algorithms, programming systems
and hardware have converged with the High Performance Computing (HPC)
counterparts. Nevertheless, the programming methodology of DL and HPC systems
is stagnant, relying on highly-optimized, yet platform-specific and inflexible
vendor-optimized libraries. Such libraries provide close-to-peak performance on
specific platforms, kernels and shapes thereof that vendors have dedicated
optimizations efforts, while they underperform in the remaining use-cases,
yielding non-portable codes with performance glass-jaws. This work introduces a
framework to develop efficient, portable DL and HPC kernels for modern CPU
architectures. We decompose the kernel development in two steps: 1) Expressing
the computational core using Tensor Processing Primitives (TPPs): a compact,
versatile set of 2D-tensor operators, 2) Expressing the logical loops around
TPPs in a high-level, declarative fashion whereas the exact instantiation
(ordering, tiling, parallelization) is determined via simple knobs. We
demonstrate the efficacy of our approach using standalone kernels and
end-to-end workloads that outperform state-of-the-art implementations on
diverse CPU platforms.
