  Many state-of-the-art Satisfiability Modulo Theories (SMT) solvers for the
theory of fixed-size bit-vectors employ an approach called bit-blasting, where
a given formula is translated into a Boolean satisfiability (SAT) problem and
delegated to a SAT solver. Consequently, producing bit-vector proofs in an SMT
solver requires incorporating SAT proofs into its proof infrastructure. In this
paper, we describe three approaches for integrating DRAT proofs generated by an
off-the-shelf SAT solver into the proof infrastructure of the SMT solver CVC4
and explore their strengths and weaknesses. We implemented all three approaches
using cryptominisat as the SAT back-end for its bit-blasting engine and
evaluated performance in terms of proof-production and proof-checking.
