  The advancement of nanoscale electronics has been limited by energy
dissipation challenges for over a decade. Such limitations could be
particularly severe for two-dimensional (2D) semiconductors integrated with
flexible substrates or multi-layered processors, both being critical thermal
bottlenecks. To shed light into fundamental aspects of this problem, here we
report the first direct measurement of spatially resolved temperature in
functioning 2D monolayer MoS$_2$ transistors. Using Raman thermometry we
simultaneously obtain temperature maps of the device channel and its substrate.
This differential measurement reveals the thermal boundary conductance (TBC) of
the MoS$_2$ interface (14 $\pm$ 4 MWm$^-$$^2$K$^-$$^1$) is an order magnitude
larger than previously thought, yet near the low end of known solid-solid
interfaces. Our study also reveals unexpected insight into non-uniformities of
the MoS$_2$ transistors (small bilayer regions), which do not cause significant
self-heating, suggesting that such semiconductors are less sensitive to
inhomogeneity than expected. These results provide key insights into energy
dissipation of 2D semiconductors and pave the way for the future design of
energy-efficient 2D electronics.
