  Computation is currently seen as a forward propagator that evolves (retards)
a completely defined initial vector into a corresponding final vector. Initial
and final vectors map the (logical) input and output of a reversible Boolean
network respectively, whereas forward propagation maps a one-way propagation of
logical implication, from input to output. Conversely, hard NP-complete
problems are characterized by a two-way propagation of logical implication from
input to output and vice versa, given that both are partly defined from the
beginning. Logical implication can be propagated forward and backward in a
computation by constructing the gate array corresponding to the entire
reversible Boolean network and constraining output bits as well as input bits.
The possibility of modeling the physical process undergone by such a network by
using a retarded and advanced in time propagation scheme is investigated. PACS
numbers: 89.70.+c, 02.50.-r, 03.65.-w, 89.80.+h
