  Logical qubits can be protected from decoherence by performing QEC cycles
repeatedly. Algorithms for fault-tolerant QEC must be compiled to the specific
hardware platform under consideration in order to practically realize a quantum
memory that operates for in principle arbitrary long times. All circuit
components must be assumed as noisy unless specific assumptions about the form
of the noise are made. Modern QEC schemes are challenging to implement
experimentally in physical architectures where in-sequence measurements and
feed-forward of classical information cannot be reliably executed fast enough
or even at all. Here we provide a novel scheme to perform QEC cycles without
the need of measuring qubits that is fully fault-tolerant with respect to all
components used in the circuit. Our scheme can be used for any low-distance CSS
code since its only requirement towards the underlying code is a transversal
CNOT gate. Similarly to Steane-type EC, we coherently copy errors to a logical
auxiliary qubit but then apply a coherent feedback operation from the auxiliary
system to the logical data qubit. The logical auxiliary qubit is prepared
fault-tolerantly without measurements, too. We benchmark logical failure rates
of the scheme in comparison to a flag-qubit based EC cycle. We map out a
parameter region where our scheme is feasible and estimate physical error rates
necessary to achieve the break-even point of beneficial QEC with our scheme. We
outline how our scheme could be implemented in ion traps and with neutral atoms
in a tweezer array. For recently demonstrated capabilities of atom shuttling
and native multi-atom Rydberg gates, we achieve moderate circuit depths and
beneficial performance of our scheme while not breaking fault tolerance. These
results thereby enable practical fault-tolerant QEC in hardware architectures
that do not support mid-circuit measurements.
