  The recursive comb filters or Cascaded Integrator Comb filter (CIC) are
commonly used as decimators for the sigma-delta modulators. This paper presents
the VLSI implementation, analysis and design of high-speed CIC filters which
are based on a low-pass filter. These filters are used in the signal decimation
which has the effect on reducing the sampling rate. It is also chosen because
its attractive property of both low power and low complexity since it does not
require a multiplier. Simulink toolbox available in Matlab software which is
used to simulator and Verilog HDL coding help to verify the functionality of
the CIC filters. Design procedures and examples are given for CIC filter with
emphasis on frequency response, transfer function and register width. The
implementation results show using Modified Carry Look-ahead Adder for summation
and also apply pipelined filter structure enhanced high speed and make it more
compatible with DSP applications.
