  The commercial introduction of a novel electronic device is often preceded by
a lengthy material optimization phase devoted to the suppression of device
noise as much as possible. The emergence of novel computing architectures,
however, triggers a paradigm change in noise engineering, demonstrating that a
non-suppressed, but properly tailored noise can be harvested as a computational
resource in probabilistic computing schemes. Such strategy was recently
realized on the hardware level in memristive Hopfield neural networks
delivering fast and highly energy efficient optimization performance. Inspired
by these achievements we perform a thorough analysis of simulated memristive
Hopfield neural networks relying on realistic noise characteristics acquired on
various memristive devices. These characteristics highlight the possibility of
orders of magnitude variations in the noise level depending on the material
choice as well as on the resistance state (and the corresponding active region
volume) of the devices. Our simulations separate the effects of various device
non-idealities on the operation of the Hopfield neural network by investigating
the role of the programming accuracy, as well as the noise type and noise
amplitude of the ON and OFF states. Relying on these results we propose
optimized noise tailoring, noise annealing, and external noise injection
strategies.
