  The ever-increasing computation complexity of fast-growing Deep Neural
Networks (DNNs) has requested new computing paradigms to overcome the memory
wall in conventional Von Neumann computing architectures. The emerging
Computing-In-Memory (CIM) architecture has been a promising candidate to
accelerate neural network computing. However, the data movement between CIM
arrays may still dominate the total power consumption in conventional designs.
This paper proposes a flexible CIM processor architecture named Domino to
enable stream computing and local data access to significantly reduce the data
movement energy. Meanwhile, Domino employs tailored distributed instruction
scheduling within Network-on-Chip (NoC) to implement inter-memory-computing and
attain mapping flexibility. The evaluation with prevailing CNN models shows
that Domino achieves 1.15-to-9.49$\times$ power efficiency over several
state-of-the-art CIM accelerators and improves the throughput by
1.57-to-12.96$\times$.
