  In this paper, we present a novel signal processing unit built upon the
theory of factor graphs, which is able to address a wide range of signal
processing algorithms. More specifically, the demonstrated factor graph
processor (FGP) is tailored to Gaussian message passing algorithms. We show how
to use a highly configurable systolic array to solve the message update
equations of nodes in a factor graph efficiently. A proper instruction set and
compilation procedure is presented. In a recursive least squares channel
estimation example we show that the FGP can compute a message update faster
than a state-ofthe- art DSP. The results demonstrate the usabilty of the FGP
architecture as a flexible HW accelerator for signal-processing and
communication systems.
