  Low Level RF (LLRF) control systems of linear accelerators (LINACs) are
typically implemented with heterodyne based architectures, which have complex
analog RF mixers for up and down conversion. The Gen 3 Radio Frequency
System-on-Chip (RFSoC) device from AMD Xilinx integrates data converters with
maximum RF frequency of 6~GHz. This enables direct RF sampling of C-band LLRF
signal typically operated at 5.712 GHz without any analogue mixers, which can
significantly simplify the system architecture. The data converters sample RF
signals in higher order Nyquist zones and then up or down convert digitally by
the integrated data path in RFSoC. The closed-loop feedback control firmware
implemented in FPGA integrated in RFSoC can process the base-band signal from
the ADC data path and calculate the updated phase and amplitude to be up-mixed
by the DAC data path. We have developed a C-band LLRF control RFSoC platform
with direct RF sampling, which targets Cool Copper Collider (C3) and other C or
S band LINAC research and development projects. In this paper, the architecture
of the platform will be described. We have optimized the configuration of the
data converter and characterized performance of them with RF pulses. The test
results for some of the key performance parameters for the LLRF platform with
our custom solid-state amplifier, such as phase and amplitude stability, will
be discussed in this paper.
