  Four terminal switching network is an alternative structure to realize the
logic functions in electronic circuit modeling. This network can be used to
implement a Boolean function with less number of switches than the two terminal
based CMOS switch. Each switch of the network is driven by a Boolean literal.
Any switch is connected to its four neighbors if a literal takes the value 1 ,
else it is disconnected. In our work, we aimed to develop a technique by which
we can find out if any Boolean function can be implemented with a given
four-terminal network. It is done using the path of any given lattice network.
First, we developed a synthesis tool by which we can create a library of
Boolean functions with a given four-terminal switching network and random
Boolean literals. This tool can be used to check the output of any lattice
network which can also function as a lattice network solver. In the next step,
we used the library functions to develop and test our MAPPING tool where the
functions were given as input and from the output, we can get the implemented
function in four terminal lattice network. Finally, we have proposed a
systematic procedure to implement any Boolean function with a efficient way by
any given one type of lattice network.
