  In this paper we have developed a two dimensional (2D) analytical model for
surface potential and drain current for a long channel Dual Material Gate (DMG)
Silicon-on-Insulator (SOI) Tunneling Field Effect Transistor (TFET). This model
includes the effect of drain voltage, gate metal work function, oxide thickness
and silicon film thickness, without assuming a fully depleted channel. The
proposed model also includes the effect of charge accumulation at the interface
of the two gates and the variation in the tunneling volume with the applied
gate voltage. The accuracy of the model is tested using two-dimensional
numerical simulations. In comparison to the conventional TFET, the proposed
model predicts that a DMGTFET provides a higher ON-state current (ION), a
better ON-state to OFF-state current (ION/IOFF) ratio and a better
sub-threshold slope (SS).
