  Emulating chip functionality before silicon production is crucial, especially
with the increasing prevalence of RISC-V-based designs. FPGAs are promising
candidates for such purposes due to their high-speed and reconfigurable
architecture. In this paper, we introduce our Makinote, an FPGA-based Cluster
platform, hosted at Barcelona Supercomputing Center (BSC-CNS), which is
composed of a large number of FPGAs (in total 96 AMD/Xilinx Alveo U55c) to
emulate massive size RTL designs (up to 750M ASIC cells). In addition, we
introduce our FPGA shell as a powerful tool to facilitate the utilization of
such a large FPGA cluster with minimal effort needed by the designers. The
proposed FPGA shell provides an easy-to-use interface for the RTL developers to
rapidly port such design into several FPGAs by automatically connecting to the
necessary ports, e.g., PCIe Gen4, DRAM (DDR4 and HBM), ETH10g/100g. Moreover,
specific drivers for exploiting RISC-V based architectures are provided within
the set of tools associated with the FPGA shell. We release the tool online for
further extensions.
  We validate the efficiency of our hardware platform (i.e., FPGA cluster) and
the software tool (i.e., FPGA Shell) by emulating a RISC-V processor and
experimenting HPC Challenge application running on 32 FPGAs. Our results
demonstrate that the performance improves by 8 times over the single-FPGA case.
