  Deep learning has significantly advanced the state of the art in artificial
intelligence, gaining wide popularity from both industry and academia. Special
interest is around Convolutional Neural Networks (CNN), which take inspiration
from the hierarchical structure of the visual cortex, to form deep layers of
convolutional operations, along with fully connected classifiers. Hardware
implementations of these deep CNN architectures are challenged with memory
bottlenecks that require many convolution and fully-connected layers demanding
large amount of communication for parallel computation. Multi-core CPU based
solutions have demonstrated their inadequacy for this problem due to the memory
wall and low parallelism. Many-core GPU architectures show superior performance
but they consume high power and also have memory constraints due to
inconsistencies between cache and main memory. FPGA design solutions are also
actively being explored, which allow implementing the memory hierarchy using
embedded BlockRAM. This boosts the parallel use of shared memory elements
between multiple processing units, avoiding data replicability and
inconsistencies. This makes FPGAs potentially powerful solutions for real-time
classification of CNNs. Both Altera and Xilinx have adopted OpenCL co-design
framework from GPU for FPGA designs as a pseudo-automatic development solution.
In this paper, a comprehensive evaluation and comparison of Altera and Xilinx
OpenCL frameworks for a 5-layer deep CNN is presented. Hardware resources,
temporal performance and the OpenCL architecture for CNNs are discussed. Xilinx
demonstrates faster synthesis, better FPGA resource utilization and more
compact boards. Altera provides multi-platforms tools, mature design community
and better execution times.
