  Tunnel Field Effect Transistors (TFET) have extremely low leakage current,
exhibit excellent subthreshold swing and are less susceptible to short channel
effects. However, TFETs do face certain special challenges, particularly with
respect to the process induced variations in (i) the channel length and (ii)
the thickness of the silicon thin-film and the gate oxide. This paper, for the
first time, studies the impact of the above process variations on the
electrical characteristics of a Double Gate Tunnel Field Effect Transistor
(DGTFET). Using two dimensional device simulations, we propose the Strained
Double Gate Tunnel Field Effect Transistor (SDGTFET) with high-k gate
dielectric as a possible solution for effectively compensating the process
induced variations in the on-current, threshold voltage and subthreshold-swing
improving the reliability of the DGTFET.
