  High-Level Synthesis (HLS) is emerging as a mainstream design methodology,
allowing software designers to enjoy the benefits of a hardware implementation.
Significant work has led to effective compilers that produce high-quality
hardware designs from software specifications. However, in order to fully
benefit from the promise of HLS, a complete ecosystem that provides the ability
to analyze, debug, and optimize designs is essential. This ecosystem has to be
accessible to software designers. This is challenging, since software
developers view their designs very differently than how they are physically
implemented on-chip. Rather than individual sequential lines of code, the
implementation consists of gates operating in parallel across multiple clock
cycles. In this paper, we report on our efforts to create an ecosystem that
allows software designers to debug HLS-generated circuits in a familiar manner.
We have implemented our ideas in a debug framework that will be included in the
next release of the popular LegUp high-level synthesis tool.
