  A new TDC-chip is under development for the COMPASS experiment at CERN. The
ASIC, which exploits the 0.6 micrometer CMOS sea-of-gate technology, will allow
high resolution time measurements with digitization of 75 ps, and an
unprecedented degree of flexibility accompanied by high rate capability and low
power consumption. Preliminary specifications of this new TDC chip are
presented.
  Furthermore a FPGA based readout-driver and buffer-module as an interface
between the front-end of the COMPASS detector systems and an optical S-LINK is
in development. The same module serves also as remote fan-out for the COMPASS
trigger distribution and time synchronization system. This readout-driver
monitors the trigger and data flow to and from front-ends. In addition, a
specific data buffer structure and sophisticated data flow control is used to
pursue local pre-event building. At start-up the module controls all necessary
front-end initializations.
