  To address the 'memory wall' problem in NN hardware acceleration, we
introduce HALO-CAT, a software-hardware co-design optimized for Hidden Neural
Network (HNN) processing. HALO-CAT integrates Layer-Penetrative Tiling (LPT)
for algorithmic efficiency, reducing intermediate result sizes. Furthermore,
the architecture employs an activation-localized computing-in-memory approach
to minimize data movement. This design significantly enhances energy
efficiency, achieving a 14.2x reduction in activation memory capacity and a
17.8x decrease in energy consumption, with only a 1.5% loss in accuracy,
compared to traditional HNN processors.
