  Loss of every bit in traditional logic circuits involves dissipation of power
in the form of heat that evolve to the environment. Reversible logic is one of
the alternatives that have capabilities to mitigate this dissipation by
preventing the loss of bits. It also have the potential to broaden the horizon
of futuristic reckon with its applications to quantum computation. Application
of testing strategies to the logic circuits is a necessity that guarantees
their true functioning where the researchers are at par with solutions for the
upcoming challenges and agreements for reversible logic circuits. Novel methods
of designing Toffoli, Fredkin and mixed Toffoli-Fredkin gates based reversible
circuits for testability are put fourth in this article. The proposed designs
are independent of the implementation techniques and can be brought into real
hardware devices after obtaining a stable fabrication environment. The
experimentation for the proposed models are performed on RCViewer and RevKit
tools to verify the functionality and computation of cost metrics. Fault
simulations are carried out using C++ and Java to calculate fault coverage in
respective methodologies. The results confirmed that all the presented work
outperforms existing state-of-art approaches.
