  Modern embedded technology is a driving factor in satellite miniaturization,
contributing to a massive boom in satellite launches and a rapidly evolving new
space industry. Miniaturized satellites, however, suffer from low reliability,
as traditional hardware-based fault-tolerance (FT) concepts are ineffective for
on-board computers (OBCs) utilizing modern systems-on-a-chip (SoC). Therefore,
larger satellites continue to rely on proven processors with large feature
sizes. Software-based concepts have largely been ignored by the space industry
as they were researched only in theory, and have not yet reached the level of
maturity necessary for implementation. We present the first integral,
real-world solution to enable fault-tolerant general-purpose computing with
modern multiprocessor-SoCs (MPSoCs) for spaceflight, thereby enabling their use
in future high-priority space missions. The presented multi-stage approach
consists of three FT stages, combining coarse-grained thread-level distributed
self-validation, FPGA reconfiguration, and mixed criticality to assure
long-term FT and excellent scalability for both resource constrained and
critical high-priority space missions. Early benchmark results indicate a
drastic performance increase over state-of-the-art radiation-hard OBC designs
and considerably lower software- and hardware development costs. This approach
was developed for a 4-year European Space Agency (ESA) project, and we are
implementing a tiled MPSoC prototype jointly with two industrial partners.
