  Data center interconnects (DCIs) will have to support throughputs of 400 Gbps
or more per wavelength in the near future. To achieve such high data rates,
coherent modulation and detection is used, which conventionally requires
high-speed data conversion and signal processing in the digital domain.
Alternatively, high-speed signal conditioning and processing could be carried
out in co-designed photonic and electronic integrated circuits, in the optical
and electrical analog domains, respectively, to achieve reduced power
consumption, latency, form factor, and cost. A few demonstrations of analog
domain processing electronic integrated circuits (EICs), including those of
equalizer and carrier phase recovery (CPR) modules showcase progress in this
direction in the literature. In this brief, for the first time, we present
integration of a silicon photonic integrated coherent receiver (ICR) module
with a CPR module, as a part of a complete coherent receiver solution. A phase
shifter in the ICR (fabricated in a 220 nm silicon-on-insulator technology)
receives feedback from a CPR EIC, and the combination compensates for the time
varying phase offset between the modulated signal and the unmodulated carrier
in the closed loop configuration. In this proof-of-concept demonstration, we
present experimental results obtained from the stand-alone silicon photonic ICR
along with its system level integration with CPR chip, for QPSK signals. The
technique can be extended to a higher-order modulation format, such as 16-QAM,
for data rate scaling. The proposed scheme is suitable for homodyne systems,
such as polarization multiplexed carrier based self-homodyne links.
