  We propose a system comprised of fixed-topology neural networks having
partially frozen weights, named SemifreddoNets. SemifreddoNets work as
fully-pipelined hardware blocks that are optimized to have an efficient
hardware implementation. Those blocks freeze a certain portion of the
parameters at every layer and replace the corresponding multipliers with fixed
scalers. Fixing the weights reduces the silicon area, logic delay, and memory
requirements, leading to significant savings in cost and power consumption.
Unlike traditional layer-wise freezing approaches, SemifreddoNets make a
profitable trade between the cost and flexibility by having some of the weights
configurable at different scales and levels of abstraction in the model.
Although fixing the topology and some of the weights somewhat limits the
flexibility, we argue that the efficiency benefits of this strategy outweigh
the advantages of a fully configurable model for many use cases. Furthermore,
our system uses repeatable blocks, therefore it has the flexibility to adjust
model complexity without requiring any hardware change. The hardware
implementation of SemifreddoNets provides up to an order of magnitude reduction
in silicon area and power consumption as compared to their equivalent
implementation on a general-purpose accelerator.
