  Electrons and holes confined in quantum dots define an excellent building
block for quantum emergence, simulation, and computation. In order for quantum
electronics to become practical, large numbers of quantum dots will be
required, necessitating the fabrication of scaled structures such as linear and
2D arrays. Group IV semiconductors contain stable isotopes with zero nuclear
spin and can thereby serve as excellent host for spins with long quantum
coherence. Here we demonstrate group IV quantum dot arrays in silicon
metal-oxide-semiconductor (SiMOS), strained silicon (Si/SiGe) and strained
germanium (Ge/SiGe). We fabricate using a multi-layer technique to achieve
tightly confined quantum dots and compare integration processes. While SiMOS
can benefit from a larger temperature budget and Ge/SiGe can make ohmic contact
to metals, the overlapping gate structure to define the quantum dots can be
based on a nearly identical integration. We realize charge sensing in each
platform, for the first time in Ge/SiGe, and demonstrate fully functional
linear and two-dimensional arrays where all quantum dots can be depleted to the
last charge state. In Si/SiGe, we tune a quintuple quantum dot using the N+1
method to simultaneously reach the few electron regime for each quantum dot. We
compare capacitive cross talk and find it to be the smallest in SiMOS, relevant
for the tuning of quantum dot arrays. These results constitute an excellent
base for quantum computation with quantum dots and provide opportunities for
each platform to be integrated with standard semiconductor manufacturing.
