  Transformers have emerged as a powerful tool for natural language processing
(NLP) and computer vision. Through the attention mechanism, these models have
exhibited remarkable performance gains when compared to conventional approaches
like recurrent neural networks (RNNs) and convolutional neural networks (CNNs).
Nevertheless, transformers typically demand substantial execution time due to
their extensive computations and large memory footprint. Processing in-memory
(PIM) and near-memory computing (NMC) are promising solutions to accelerating
transformers as they offer high compute parallelism and memory bandwidth.
However, designing PIM/NMC architectures to support the complex operations and
massive amounts of data that need to be moved between layers in transformer
neural networks remains a challenge. We propose ARTEMIS, a mixed
analog-stochastic in-DRAM accelerator for transformer models. Through employing
minimal changes to the conventional DRAM arrays, ARTEMIS efficiently alleviates
the costs associated with transformer model execution by supporting stochastic
computing for multiplications and temporal analog accumulations using a novel
in-DRAM metal-on-metal capacitor. Our analysis indicates that ARTEMIS exhibits
at least 3.0x speedup, 1.8x lower energy, and 1.9x better energy efficiency
compared to GPU, TPU, CPU, and state-of-the-art PIM transformer hardware
accelerators.
