  A scalable readout system (SRS) is designed to provide a general solution for
different micro-pattern gas detectors. The system mainly consists of three
kinds of modules: the ASIC card, the Adapter card and the Front-End Card (FEC).
The ASIC cards, mounted with particular ASIC chips, are designed for receiving
detector signals. The Adapter card is in charge of digitizing the output
signals from several ASIC cards. The FEC, edged-mounted with the Adapter, has a
FPGA-based reconfigurable logic and I/O interfaces, allowing users to choose
various ASIC cards and Adapters for different types of detectors. The FEC
transfers data through Gigabit Ethernet protocol realized by a TCP processor
(SiTCP) IP core in field-programmable gate arrays (FPGA). The readout system
can be tailored to specific sizes to adapt to the experiment scales and readout
requirements. In this paper, two kinds of multi-channel ASIC chips, VA140 and
AGET, are applied to verify the concept of this SRS architecture. Based on this
VA140 or AGET SRS, one FEC covers 8 ASIC (VA140) cards handling 512 detector
channels, or 4 ASIC (AGET) cards handling 256 detector channels. More FECs can
be assembled in chassis to handle thousands of detector channels.
