  High-level synthesis (HLS) has been widely adopted as it significantly
improves the hardware design productivity and enables efficient design space
exploration (DSE). Existing HLS tools are built using compiler infrastructures
largely based on a single-level abstraction, such as LLVM. However, as HLS
designs typically come with intrinsic structural or functional hierarchies,
different HLS optimization problems are often better solved with different
levels of abstractions. This paper proposes ScaleHLS, a new scalable and
customizable HLS framework, on top of a multi-level compiler infrastructure
called MLIR. ScaleHLS represents HLS designs at multiple representation levels
and provides an HLS-dedicated analysis and transform library to solve the
optimization problems at the suitable levels. Using this library, we provide a
DSE engine to generate optimized HLS designs automatically. In addition, we
develop an HLS C front-end and a C/C++ emission back-end to translate HLS
designs into/from MLIR for enabling an end-to-end compilation flow.
Experimental results show that, comparing to the baseline designs without
manual directives insertion and code-rewriting, that are only optimized by
Xilinx Vivado HLS, ScaleHLS improves the performances with amazing
quality-of-results -- up to 768.1x better on computation kernel level programs
and up to 3825.0x better on neural network models.
