  T0 detector, based on Multi-gap Resistive Plate Chambers (MRPC) technology,
is one of the key components in the External Target Experiment. Through
precision measurements of the MRPC signals, timing of the beam impact on target
can be obtained and used as the start time for other detectors. A readout
electronics system was designed for the T0 detector. Based on the NINO ASIC,
front-end-electronics (FEE) circuits which can achieve high precision
leading-edge discrimination and Charge-to-Time Conversion (QTC) were designed
for the internal and external MRPCs of the T0 detector. The output pulse of the
FEE is then digitized by high precision time digitization modules with
Time-to-Digital Converters (TDCs), trigger matching and other control logic
integrated within Field Programmable Gate Array (FPGA) devices. To evaluate the
functionality and performance, we also conducted a series of tests of the
electronics. Results indicate that the system functions well and the time
precision of the electronics is better than 21 ps, which satisfies the
application requirement.
