  Computer architecture design space is vast and complex. Tools are needed to
explore new ideas and gain insights quickly, with low efforts and at a desired
accuracy. We propose Calipers, a criticality-based framework to model key
abstractions of complex architectures and a program's execution using dynamic
event-dependence graphs. By applying graph algorithms, Calipers can track
instruction and event dependencies, compute critical paths, and analyze
architecture bottlenecks. By manipulating the graph, Calipers enables
architects to investigate a wide range of Instruction Set Architecture (ISA)
and microarchitecture design choices/"what-if" scenarios during both early- and
late-stage design space exploration without recompiling and rerunning the
program. Calipers can model in-order and out-of-order microarchitectures,
structural hazards, and different types of ISAs, and can evaluate multiple
ideas in a single run. Modeling algorithms are described in detail.
  We apply Calipers to explore and gain insights in complex microarchitectural
and ISA ideas for RISC and EDGE processors, at lower effort than cycle-accurate
simulators and with comparable accuracy. For example, among a variety of
investigations presented in the paper, experiments show that targeting only a
fraction of critical loads can help realize most benefits of value prediction.
