  In modern solid-state drives (SSDs), the indexing of flash pages is a
critical component in their storage controllers. It not only affects the data
access performance, but also determines the efficiency of the precious
in-device DRAM resource. A variety of address mapping schemes and optimization
techniques have been proposed. However, most of them were developed with
human-driven heuristics. They cannot automatically capture diverse data access
patterns at runtime in SSD controllers, which leaves a large room for
improvement. In this paper, we present a learning-based flash translation layer
(FTL), named LeaFTL, which learns the address mapping to tolerate dynamic data
access patterns via linear regression at runtime. By grouping a large set of
mapping entries into a learned segment, it significantly reduces the memory
footprint of the address mapping table, which further benefits the data caching
in SSD controllers. LeaFTL also employs various optimization techniques,
including out-of-band metadata verification to tolerate mispredictions,
optimized flash allocation, and dynamic compaction of learned index segments.
We implement LeaFTL with an SSD simulator and evaluate it with various storage
workloads. LeaFTL saves the memory consumption of the mapping table by 2.9x on
average and improves the storage performance by 1.4x on average, in comparison
with state-of-the-art FTL schemes.
