  Ternary content addressable memory (TCAM) has been a critical component in
caches, routers, etc., in which density, speed, power efficiency, and
reliability are the major design targets. There have been the conventional
low-write-power but bulky SRAM-based TCAM design, and also denser but less
reliable or higher-write-power TCAM designs using nonvolatile memory (NVM)
devices. Meanwhile, some TCAM designs using dynamic memories have been also
proposed. Although dynamic design TCAM is denser than CMOS SRAM TCAM and more
reliable than NVM TCAM, the conventional row-by-row refresh operations land up
with a bottleneck of interference with normal TCAM activities. Therefore, this
paper proposes a custom low-power dynamic TCAM using nanoelectromechanical
(NEM) relay devices utilizing one-shot refresh to solve the memory refresh
problem. By harnessing the unique NEM relay characteristics with a proposed
novel cell structure, the proposed TCAM occupies a small footprint of only 3
transistors (with two NEM relays integrated on the top through the
back-end-of-line process), which significantly outperforms the density of
16-transistor SRAM-based TCAM. In addition, evaluations show that the proposed
TCAM improves the write energy efficiency by 2.31x, 131x, and 13.5x over SRAM,
RRAM, and FeFET TCAMs, respectively; The search energy-delay-product is
improved by 12.7x, 1.30x, and 2.83x over SRAM, RRAM, and FeFET TCAMs,
respectively.
