  Modern internet of things (IoT) devices leverage machine learning inference
using sensed data on-device rather than offloading them to the cloud. Commonly
known as inference at-the-edge, this gives many benefits to the users,
including personalization and security. However, such applications demand high
energy efficiency and robustness. In this paper we propose a method for reduced
area and power overhead of self-timed early-propagative asynchronous inference
circuits, designed using the principles of learning automata. Due to natural
resilience to timing as well as logic underpinning, the circuits are tolerant
to variations in environment and supply voltage whilst enabling the lowest
possible latency. Our method is exemplified through an inference datapath for a
low power machine learning application. The circuit builds on the Tsetlin
machine algorithm further enhancing its energy efficiency. Average latency of
the proposed circuit is reduced by 10x compared with the synchronous
implementation whilst maintaining similar area. Robustness of the proposed
circuit is proven through post-synthesis simulation with 0.25 V to 1.2 V
supply. Functional correctness is maintained and latency scales with gate delay
as voltage is decreased.
