  Reactive synthesis aims at automatic construction of systems from their
behavioural specifications. The research mostly focuses on synthesis of systems
dealing with Boolean signals. But real-life systems are often described using
bit-vectors, integers, etc. Bit-blasting would make such systems unreadable,
hit synthesis scalability, and is not possible for infinite data-domains. One
step closer to real-life systems are register transducers: they can store
data-input into registers and later output the content of a register, but they
do not directly depend on the data-input, only on its comparison with the
registers. Previously it was proven that synthesis of register transducers from
register automata is undecidable, but there the authors considered transducers
equipped with the unbounded queue of registers. First, we prove the problem
becomes decidable if bound the number of registers in transducers, by reducing
the problem to standard synthesis of Boolean systems. Second, we show how to
use quantified temporal logic, instead of automata, for specifications.
