  In this paper, we propose a novel accuracy-reconfigurable stochastic
computing (ARSC) framework for dynamic reliability and power management.
Different than the existing stochastic computing works, where the accuracy
versus power/energy trade-off is carried out in the design time, the new ARSC
design can change accuracy or bit-width of the data in the run-time so that it
can accommodate the long-term aging effects by slowing the system clock
frequency at the cost of accuracy while maintaining the throughput of the
computing. We validate the ARSC concept on a discrete cosine transformation
(DCT) and inverse DCT designs for image compressing/decompressing applications,
which are implemented on Xilinx Spartan-6 family XC6SLX45 platform.
Experimental results shows that the new design can easily mitigate the
long-term aging induced effects by accuracy trade-off while maintaining the
throughput of the whole computing process using simple frequency scaling. We
further show that one-bit precision loss for input data, which translated to
3.44dB of the accuracy loss in term of Peak Signal to Noise Ratio for images,
we can sufficiently compensate the NBTI induced aging effects in 10 years while
maintaining the pre-aging computing throughput of 7.19 frames per second. At
the same time, we can save 74\% power consumption by 10.67dB of accuracy loss.
The proposed ARSC computing framework also allows much aggressive frequency
scaling, which can lead to order of magnitude power savings compared to the
traditional dynamic voltage and frequency scaling (DVFS) techniques.
