  Tavenas has recently proved that any n^{O(1)}-variate and degree n polynomial
in VP can be computed by a depth-4 circuit of size 2^{O(\sqrt{n}\log n)}. So to
prove VP not equal to VNP, it is sufficient to show that an explicit polynomial
in VNP of degree n requires 2^{\omega(\sqrt{n}\log n)} size depth-4 circuits.
Soon after Tavenas's result, for two different explicit polynomials, depth-4
circuit size lower bounds of 2^{\Omega(\sqrt{n}\log n)} have been proved Kayal
et al. and Fournier et al. In particular, using combinatorial design Kayal et
al.\ construct an explicit polynomial in VNP that requires depth-4 circuits of
size 2^{\Omega(\sqrt{n}\log n)} and Fournier et al.\ show that iterated matrix
multiplication polynomial (which is in VP) also requires 2^{\Omega(\sqrt{n}\log
n)} size depth-4 circuits.
  In this paper, we identify a simple combinatorial property such that any
polynomial f that satisfies the property would achieve similar circuit size
lower bound for depth-4 circuits. In particular, it does not matter whether f
is in VP or in VNP. As a result, we get a very simple unified lower bound
analysis for the above mentioned polynomials.
  Another goal of this paper is to compare between our current knowledge of
depth-4 circuit size lower bounds and determinantal complexity lower bounds. We
prove the that the determinantal complexity of iterated matrix multiplication
polynomial is \Omega(dn) where d is the number of matrices and n is the
dimension of the matrices. So for d=n, we get that the iterated matrix
multiplication polynomial achieves the current best known lower bounds in both
fronts: depth-4 circuit size and determinantal complexity. To the best of our
knowledge, a \Theta(n) bound for the determinantal complexity for the iterated
matrix multiplication polynomial was known only for constant d>1 by Jansen.
