  A fractional order (FO) PID or FOPID controller is designed for an Automatic
Voltage Regulator (AVR) system with the consideration of contradictory
performance objectives. An improved evolutionary Non-dominated Sorting Genetic
Algorithm (NSGA-II), augmented with a chaotic Henon map is used for the
multi-objective optimization based design procedure. The Henon map as the
random number generator outperforms the original NSGA-II algorithm and its
Logistic map assisted version for obtaining a better design trade-off with an
FOPID controller. The Pareto fronts showing the trade-offs between the
different design objectives have also been shown for both the FOPID controller
and the conventional PID controller to enunciate the relative merits and
demerits of each. The design is done in frequency domain and hence stability
and robustness of the design is automatically guaranteed unlike the other time
domain optimization based controller design methods.
