  Future generations of processors will exhibit an increase of faults over
their lifetime, and it becomes increasingly expensive to solve the resulting
reliability issues purely at the hardware level. We propose to model
computations in terms of restartable task graphs in order to improve
reliability at the software level. As a proof of concept, we present Cobra, a
novel design for a shared-memory work-stealing scheduler that realizes this
notion of restartable task graphs, and enables computations to survive hardware
failures due to soft errors. A comparison with the work-stealing scheduler of
Threading Building Blocks on the PARSEC benchmark suite shows that Cobra incurs
no performance overhead in the absence of failures, and low performance
overheads in the presence of single and multiple failures.
