  Polar codes has been selected as 5G standard. However, only a couple of ASIC
featuring decoders are fabricated,and none of them support list size L > 4 and
code length N > 1024. This paper presents an ASIC implementation of three
decoders for polar code: successive cancellation (SC) decoder, flexible decoder
and ultra-reliable decoder. These decoders are all SC based decoder, supporting
list size up to 1,8,32 and code length up to 2^15,2^14,2^11 respectively. This
chip is fabricated in a 16nm TSMC FinFET technology, and can be clocked at 1
Ghz. Optimization techniques are proposed and employed to increase throughput.
Experiment result shows that the throughput can achieve up to 5.16Gbps.
Compared with fabricated AISC decoder and synthesized decoder in literature,
the flexible decoder achieves higher area efficiency.
