  Design considerations for a below 100 nm channel length SOI MOSFET with
electrically induced shallow source/drain junctions are presented. Our
simulation results demonstrate that the application of induced source/drain
extensions to the SOI MOSFET will successfully control the SCEs and improve the
breakdown voltage even for channel lengths less than 50 nm. We conclude that if
the side gate length equals the main gate length, the hot electron effect
diminishes optimally.
