  The design of effective memory architecture is of utmost importance in modern
computing systems. However, the design of memory subsystems is even more
difficult today because process variation and modern design techniques like
dynamic voltage scaling make performance metrics for memory assessment be
treated as random variables instead of scalars at design time. Most of the
previous works have studied the design of memory design from the yield analysis
perspective leaving the question of the best memory organization on average
open. Because examining all possible combinations of design parameter values of
a memory chip would require prohibitively much time, in this work, we propose
Best Arm Identification (BAI) algorithms to accelerate the exploration for the
best memory architecture on average under parameter variations. Our
experimental results demonstrate that we can arrive at the best memory
organization 99% of the time in x5 faster than an exhaustive search of all
possible conditions.
