  Artificial neural networks (ANNs) have had an enormous impact on a multitude
of sectors, from research to industry, generating an unprecedented demand for
tailor-suited hardware platforms. Their training and execution is highly
memory-intensive, clearly evidencing the limitations affecting the currently
available hardware based on the von Neumann architecture, which requires
frequent data shuttling due to the physical separation of logic and memory
units. This does not only limit the achievable performances but also greatly
increases the energy consumption, hindering the integration of ANNs into
low-power platforms. New Logic in Memory (LiM) architectures, able to unify
memory and logic functionalities into a single component, are highly promising
for overcoming these limitations, by drastically reducing the need of data
transfers. Recently, it has been shown that a very flexible platform for logic
applications can be realized recurring to a multi-gated Schottky-Barrier Field
Effect Transistor (SBFET). If equipped with memory capabilities, this
architecture could represent an ideal building block for versatile LiM
hardware. To reach this goal, here we investigate the integration of a
ferroelectric Hf$_{0.5}$Zr$_{0.5}$O$_2$ (HZO) layer onto Dual Top Gated SBFETs.
We demonstrate that HZO polarization charges can be successfully employed to
tune the height of the two Schottky barriers, influencing the injection
behavior, thus defining the transistor mode, switching it between n and p-type
transport. The modulation strength is strongly dependent on the polarization
pulse height, allowing for the selection of multiple current levels. All these
achievable states can be well retained over time, thanks to the HZO stability.
The presented result show how ferroelectric-enhanced SBFETs are promising for
the realization of novel LiM hardware, enabling low-power circuits for ANNs
execution.
