  Analog-to-digital converters (ADCs) are key components of digital signal
processing. Classical samplers in this framework are controlled by a global
clock. At high sampling rates, clocks are expensive and power-hungry, thus
increasing the cost and energy consumption of ADCs. It is, therefore, desirable
to sample using a clock-less ADC at the lowest possible rate. An
integrate-and-fire time-encoding machine (IF-TEM) is a time-based
power-efficient asynchronous design that is not synced to a global clock.
Finite-rate-of-innovation (FRI) signals, ubiquitous in various applications,
have fewer degrees of freedom than the signal's Nyquist rate, enabling
sub-Nyquist sampling signal models. This work proposes a power-efficient IF-TEM
ADC architecture and demonstrates sub-Nyquist sampling and FRI signal recovery.
Using an IF-TEM, we implement in hardware the first sub-Nyquist time-based
sampler. We offer a feasible approach for accurately estimating the FRI
parameters from IF-TEM data. The suggested hardware and reconstruction approach
retrieves FRI parameters with an error of up to -25dB while operating at rates
approximately 10 times lower than the Nyquist rate, paving the way to low-power
ADC architectures.
