  Spin-Torque-Transfer RAM (STTRAM) is a promising technology however process
variation poses serious challenge to sensing. To eliminate bit-to-bit process
variation we propose a reference-less, destructive slope detection technique
which exploits the MTJ switching from high to low state to detect memory state.
A proof-of-concept fabricated test-chip using 96kb mimicked STTRAM bits in 65nm
technology shows that slope sensing reduces failure rate by 120X in 2.5K-5K
array@TMR=100% and 162X in 2.5K-5K@TMR=80% array compared to conventional
voltage sensing.
