  We present a novel approach for calculating the Coulomb Blockade Phase
Diagram (CBPD) in the experimentally accessible strong coupling regime of a
single-electron transistor (SET). Our method utilizes the Path Integral Monte
Carlo (PIMC) technique to accurately compute the Coulomb oscillation of the
Differential Capacitance (DC). Furthermore, we investigate the impact of the
gate voltage and temperature variations on the DC, thereby gaining insights
into the system's behaviour. As a result, we propose a method to calculate the
Coulomb Blockade Boundary Line (CBBL) and demonstrate its efficacy by setting
the visibility parameter to $10\%$. The resulting boundary line effectively
defines the transition between the Coulomb and non-Coulomb blockade regimes,
thereby enabling the construction of a comprehensive CBPD.
