  Deep Spiking Neural Networks are becoming increasingly powerful tools for
cognitive computing platforms. However, most of the existing literature on such
computing models are developed with limited insights on the underlying hardware
implementation, resulting in area and power expensive designs. Although several
neuromimetic devices emulating neural operations have been proposed recently,
their functionality has been limited to very simple neural models that may
prove to be inefficient at complex recognition tasks. In this work, we venture
into the relatively unexplored area of utilizing the inherent device
stochasticity of such neuromimetic devices to model complex neural
functionalities in a probabilistic framework in the time domain. We consider
the implementation of a Deep Spiking Neural Network capable of performing high
accuracy and low latency classification tasks where the neural computing unit
is enabled by the stochastic switching behavior of a Magnetic Tunnel Junction.
Simulation studies indicate an energy improvement of $20\times$ over a baseline
CMOS design in $45nm$ technology.
