  While deep neural networks have been shown in recent years to outperform
other machine learning methods in a wide range of applications, one of the
biggest challenges with enabling deep neural networks for widespread deployment
on edge devices such as mobile and other consumer devices is high computational
and memory requirements. Recently, there has been greater exploration into
small deep neural network architectures that are more suitable for edge
devices, with one of the most popular architectures being SqueezeNet, with an
incredibly small model size of 4.8MB. Taking further advantage of the notion
that many applications of machine learning on edge devices are often
characterized by a low number of target classes, this study explores the
utility of combining architectural modifications and an evolutionary synthesis
strategy for synthesizing even smaller deep neural architectures based on the
more recent SqueezeNet v1.1 macroarchitecture for applications with fewer
target classes. In particular, architectural modifications are first made to
SqueezeNet v1.1 to accommodate for a 10-class ImageNet-10 dataset, and then an
evolutionary synthesis strategy is leveraged to synthesize more efficient deep
neural networks based on this modified macroarchitecture. The resulting
SquishedNets possess model sizes ranging from 2.4MB to 0.95MB (~5.17X smaller
than SqueezeNet v1.1, or 253X smaller than AlexNet). Furthermore, the
SquishedNets are still able to achieve accuracies ranging from 81.2% to 77%,
and able to process at speeds of 156 images/sec to as much as 256 images/sec on
a Nvidia Jetson TX1 embedded chip. These preliminary results show that a
combination of architectural modifications and an evolutionary synthesis
strategy can be a useful tool for producing very small deep neural network
architectures that are well-suited for edge device scenarios.
