  Ising machines have emerged as a promising solution for rapidly solving
NP-complete combinatorial optimization problems, surpassing the capabilities of
traditional computing methods. By efficiently determining the ground state of
the Hamiltonian during the annealing process, Ising machines can effectively
complement CPUs in tackling optimization challenges. To realize these Ising
machines, a bi-stable oscillator is essential to emulate the atomic spins and
interactions of the Ising model. This study introduces a Josephson parametric
oscillator (JPO)-based tile structure, serving as a fundamental unit for
scalable superconductor-based Ising machines. Leveraging the bi-stable nature
of JPOs, which are superconductor-based oscillators, the proposed machine can
operate at frequencies of 7.5GHz while consuming significantly less power (by
three orders of magnitude) than CMOS-based systems. Furthermore, the
compatibility of the proposed tile structure with the Lechner-Hauke-Zoller
(LHZ) architecture ensures its viability for large-scale integration. We
conducted simulations of the tile in a noisy environment to validate its
functionality. We verified its operational characteristics by comparing the
results with the analytical solution of its Hamiltonian model. This
verification demonstrates the feasibility and effectiveness of the JPO-based
tile in implementing Ising machines, opening new avenues for efficient and
scalable combinatorial optimization in quantum computing.
