  Adaptive systems based on field programmable gate array (FPGA) architectures
can greatly benefi t fro m th e high degree of flexibility offered by dynamic
partial reconfiguration (DPR). By using this technique, hardware tasks can be
loaded and reloaded on demand depending on the system requirements. In this
paper, we propose to use the DPR for dynamic and adaptive implementation of a
video cut detection application based on the MPEG-7 color structure descriptor
(CSD). In the proposed implementation, different scenarios have been tested.
Depending on the application and the system requirements, the CSD module can be
loaded at any time with variable module size (corresponding to different
version of the CSD) and allocated in different possible reconfigurable regions.
Such implementation entails many problems related to communication, relocation
and reconfigurable region management. We will demonstrate how we have made this
implementation successful through the use of an appropriate design method. This
method was proposed to support the management of variable-size hardware tasks
on DPR FPGAs based adaptive systems. It permits to efficiently handle the
reconfigurable area and to relocate the reconfigurable modules in different
possible regions. The implementation results for the considered application
show an important optimization in terms of configuration time (until 66 %) and
memory storage (until 87 %) and an efficient hardware resources utilization
rate (until 90%).
