  This paper proposes a novel foreground linearization scheme for a high-speed
CS-DAC. The technique leverages neural networks (NNs) to derive a LUT that maps
the inverse of the DAC transfer characteristic onto the input codes. The
algorithm is shown to improve conventional methods by at least 6dB in terms of
intermodulation (IM) performance for frequencies up to 9GHz on a
state-of-the-art 10-bit CS-DAC operating at 40.96GS/s (gigasamples-per-second)
in 14nm CMOS.
