  Approximate Logic Synthesis (ALS) is the process of synthesizing and mapping
a given Boolean network to a library of logic cells so that the magnitude/rate
of error between outputs of the approximate and initial (exact) Boolean
netlists is bounded from above by a predetermined total error threshold. In
this paper, we present Q-ALS, a novel framework for ALS with focus on the
technology mapping phase. Q-ALS incorporates reinforcement learning and
utilizes Boolean difference calculus to estimate the maximum error rate that
each node of the given network can tolerate such that the total error rate at
non of the outputs of the mapped netlist exceeds a predetermined maximum error
rate, and the worst case delay and the total area are minimized. Maximum
Hamming Distance (MHD) between exact and approximate truth tables of cuts of
each node is used as the error metric. In Q-ALS, a Q-Learning agent is trained
with a sufficient number of iterations aiming to select the fittest values of
MHD for each node, and in a cut-based technology mapping approach, the best
supergates (in terms of delay and area, bounded further by the fittest MHD) are
selected towards implementing each node. Experimental results show that having
set the required accuracy of 95% at the primary outputs, Q-ALS reduces the
total cost in terms of area and delay by up to 70% and 36%, respectively, and
also reduces the run-time by 2.21 times on average, when compared to the best
state-of-the-art academic ALS tools.
