  Digital memristive processing-in-memory overcomes the memory wall through a
fundamental storage device capable of stateful logic within crossbar arrays.
Dynamically dividing the crossbar arrays by adding memristive partitions
further increases parallelism, thereby overcoming an inherent trade-off in
memristive processing-in-memory. The algorithmic topology of partitions is
highly unique, and was recently exploited to accelerate multiplication (11x
with 32 partitions) and sorting (14x with 16 partitions). Yet, the physical
implementation of memristive partitions, such as the peripheral decoders and
the control message, has never been considered and may lead to vast
impracticality. This paper overcomes that challenge with several novel
techniques, presenting efficient practical designs of memristive partitions. We
begin by formalizing the algorithmic properties of memristive partitions into
serial, parallel, and semi-parallel operations. Peripheral overhead is
addressed via a novel technique of half-gates that enables efficient decoding
with negligible overhead. Control overhead is addressed by carefully reducing
the operation set of memristive partitions, while resulting in negligible
performance impact, by utilizing techniques such as shared indices and pattern
generators. Ultimately, these efficient practical solutions, combined with the
vast algorithmic potential, may revolutionize digital memristive
processing-in-memory.
