  This study presents a methodology for anticounterfeiting of Non-Volatile
Memory (NVM) chips. In particular, we experimentally demonstrate a generalized
methodology for detecting (i) Integrated Circuit (IC) origin, (ii) recycled or
used NVM chips, and (iii) identification of used locations (addresses) in the
chip. Our proposed methodology inspects latency and variability signatures of
Commercial-Off-The-Shelf (COTS) NVM chips. The proposed technique requires
low-cycle (~100) pre-conditioning and utilizes Machine Learning (ML)
algorithms. We observe different trends in evolution of latency (sector erase
or page write) with cycling on different NVM technologies from different
vendors. ML assisted approach is utilized for detecting IC manufacturers with
95.1 % accuracy obtained on prepared test dataset consisting of 3 different NVM
technologies including 6 different manufacturers (9 types of chips).
