  Increasingly, convolution neural network (CNN) based super resolution models
have been proposed for better reconstruction results, but their large model
size and complicated structure inhibit their real-time hardware implementation.
Current hardware designs are limited to a plain network and suffer from lower
quality and high memory bandwidth requirements. This paper proposes a super
resolution hardware accelerator with hardware efficient pixel attention that
just needs 25.9K parameters and simple structure but achieves 0.38dB better
reconstruction images than the widely used FSRCNN. The accelerator adopts full
model block wise convolution for full model layer fusion to reduce external
memory access to model input and output only. In addition, CNN and pixel
attention are well supported by PE arrays with distributed weights. The final
implementation can support full HD image reconstruction at 30 frames per second
with TSMC 40nm CMOS process.
