  This paper introduces the eGPU, a SIMT soft processor designed for FPGAs.
Soft processors typically achieve modest operating frequencies, a fraction of
the headline performance claimed by modern FPGA families, and obtain
correspondingly modest performance results. We propose a GPGPU architecture
structured specifically to take advantage of both the soft logic and embedded
features of the FPGA. We also consider the physical location of the embedded
memories and DSP Blocks relative to the location and number of soft logic
elements in order to have a design with balanced resources. Our goal is to
create a high performance soft processor able to implement complex portions of
FPGA system designs, such as the linear solvers commonly used in wireless
systems, through push-button compilation from software. The eGPU architecture
is a streaming multiprocessor (SM) machine with 512 threads. Each SM contains
16 scalar processors (SP). Both IEEE754 FP32 and INT32 integer arithmetic are
supported. We demonstrate a single SM eGPU in an Intel Agilex device, requiring
5600 ALMs and 24 DSP Blocks, which closes timing at over 770 MHz from a
completely unconstrained compile. Multiple eGPUs can also be tightly packed
together into a single Agilex FPGA logic region, with minimal speed penalty.
