  If a quantum computer is stabilized by fault-tolerant quantum error
correction (QEC), then most of its resources (qubits and operations) are
dedicated to the extraction of error information. Analysis of this process
leads to a set of central requirements for candidate computing devices, in
addition to the basic ones of stable qubits and controllable gates and
measurements. The logical structure of the extraction process has a natural
geometry and hierarchy of communication needs; a computer whose physical
architecture is designed to reflect this will be able to tolerate the most
noise. The relevant networks are dominated by quantum information transport,
therefore to assess a computing device it is necessary to characterize its
ability to transport quantum information, in addition to assessing the
performance of conditional logic on nearest neighbours and the passive
stability of the memory. The transport distances involved in QEC networks are
estimated, and it is found that a device relying on swap operations for
information transport must have those operations an order of magnitude more
precise than the controlled gates of a device which can transport information
at low cost.
