  We propose and numerically simulate novel reconfigurable logic gates
employing spin metal-oxide-semiconductor field-effect transistors (spin
MOSFETs). The output characteristics of the spin MOSFETs depend on the relative
magnetization configuration of the ferromagnetic contacts for the source and
drain, that is, high current-drive capability in the parallel magnetization and
low current-drive capability in the antiparallel magnetization [S. Sugahara and
M. Tanaka: Appl. Phys. Lett. 84 (2004) 2307]. A reconfigurable NAND/NOR logic
gate can be realized by using a spin MOSFET as a driver or an active load of a
complimentary MOS (CMOS) inverter with a neuron MOS input stage. Its logic
function can be switched by changing the relative magnetization configuration
of the ferromagnetic source and drain of the spin MOSFET. A reconfigurable
logic gate for all symmetric Boolean functions can be configured using only
five CMOS inverters including four spin MOSFETs. The operation of these
reconfigurable logic gates was confirmed by numerical simulations using a
simple device model for the spin MOSFETs
