  Embedded systems have pervaded all walks of our life. With the increasing
importance of mobile embedded systems and flexible applications, considerable
progress in research has been made for power management. Power constraints are
increasingly becoming the critical component of the design specifications of
these systems. It helps in pre-determining the suitable hardware architecture
for the target application. The aim of this paper is to present a technique to
estimate 'pre-run time' and 'power' of a software mapped onto a hardware
system; guaranteeing the compliance of temporal constraints while generating a
schedule of tasks of software. Real time systems must handle several
independent macro-tasks, each represented by a task graph, which includes
communications and precedence constraints. We propose a novel approach for
power estimation of embedded software using the Control Data Flow Graph (CDFG)
or task graph model. This methodology uses an existing Hierarchical Concurrent
Flow Graph (HCFG) technique for the power analysis of the CDFGs. We have
evaluated our technique for energy efficient scheduling over various task graph
benchmarks. The results obtained prove the utility and efficacy of our proposed
approach for power analysis of embedded software. We also present a methodology
to obtain an energy optimal voltage assignment and perform scheduling by taking
advantage of the relaxation in execution time of tasks.
