  This paper presents an efficient algorithm for finding the dominant trapping
sets of a low-density parity-check (LDPC) code. The algorithm can be used to
estimate the error floor of LDPC codes or to be part of the apparatus to design
LDPC codes with low error floors. For regular codes, the algorithm is initiated
with a set of short cycles as the input. For irregular codes, in addition to
short cycles, variable nodes with low degree and cycles with low approximate
cycle extrinsic message degree (ACE) are also used as the initial inputs. The
initial inputs are then expanded recursively to dominant trapping sets of
increasing size. At the core of the algorithm lies the analysis of the
graphical structure of dominant trapping sets and the relationship of such
structures to short cycles, low-degree variable nodes and cycles with low ACE.
The algorithm is universal in the sense that it can be used for an arbitrary
graph and that it can be tailored to find other graphical objects, such as
absorbing sets and Zyablov-Pinsker (ZP) trapping sets, known to dominate the
performance of LDPC codes in the error floor region over different channels and
for different iterative decoding algorithms. Simulation results on several LDPC
codes demonstrate the accuracy and efficiency of the proposed algorithm. In
particular, the algorithm is significantly faster than the existing search
algorithms for dominant trapping sets.
