  Decoders that provide an estimate of the probability of a logical failure
conditioned on the error syndrome ("soft-output decoders") can reduce the
overhead cost of fault-tolerant quantum memory and computation. In this work,
we construct efficient soft-output decoders for the surface code derived from
the Minimum-Weight Perfect Matching and Union-Find decoders. We show that
soft-output decoding can improve the performance of a "hierarchical code," a
concatenated scheme in which the inner code is the surface code, and the outer
code is a high-rate quantum low-density parity-check code. Alternatively, the
soft-output decoding can improve the reliability of fault-tolerant circuit
sampling by flagging those runs that should be discarded because the
probability of a logical error is intolerably large.
