  As the superconducting qubit platform matures towards ever-larger scales in
the race towards a practical quantum computer, limitations due to qubit
inhomogeneity through lack of process control become apparent. To benefit from
the advanced process control in industry-scale CMOS fabrication facilities,
different processing methods will be required. In particular, the double-angle
evaporation and lift-off techniques used for current, state-of-the art
superconducting qubits are generally incompatible with modern day
manufacturable processes. Here, we demonstrate a fully CMOS compatible qubit
fabrication method, and show results from overlap Josephson junction devices
with long coherence and relaxation times, on par with the state-of-the-art. We
experimentally verify that Argon milling - the critical step during junction
fabrication - and a subtractive etch process nevertheless result in qubits with
average qubit energy relaxation times T1 reaching 70 $\mu$s, with maximum
values exceeding 100 $\mu$s. Furthermore, we show that our results are still
limited by surface losses and not, crucially, by junction losses. The presented
fabrication process therefore heralds an important milestone towards a
manufacturable 300 mm CMOS process for high-coherence superconducting qubits
and has the potential to advance the scaling of superconducting device
architectures.
