  While microprocessors are used in various applications, they are precluded
from the use in high-energy physics applications due to the harsh radiation
present. To overcome this limitation a microprocessor design must withstand
high doses of radiation and mitigate radiation induced soft errors. A TMR
protection scheme is applied to protect a RISC-V microprocessor core against
these faults. The protection of the integrated SRAM by an independent scrubbing
algorithm is discussed. Initial irradiation results and power consumption
measurements of the radiation-resistant RISC-V microprocessor implemented in 65
nm CMOS technology are presented.
