  Single walled carbon nanotubes (SWNTs) have attracted immense research
interest because of their remarkable physical and electronic properties. In
particular, electronic devices fabricated using individual SWNT have shown
outstanding device performance surpassing those of Si. However, for the
widespread application of SWNTs based electronic devices, parallel fabrication
techniques along with Complementary Metal Oxide (CMOS) compatibility are
required. One technique that has the potential to integrate SWNTs at the
selected position of the circuit in a parallel fashion is AC dielectrophoresis
(DEP). In this paper, we review recent progress in the parallel fabrication of
SWNT-based devices using DEP. The review begins with a theoretical background
for the DEP and then discusses various parameters affecting DEP assembly of
SWNTs. We also review the electronic transport properties of the DEP assembled
devices and show that high performance devices can be fabricated using DEP. The
technique for fabricating all semiconducting field effect transistor using DEP
is also reviewed. Finally, we discuss the challenges and opportunities for the
DEP assembly of SWNTs.
