  The recent emergence of novel computational devices, such as adiabatic
quantum computers, CMOS annealers, and optical parametric oscillators, present
new opportunities for hybrid-optimization algorithms that are hardware
accelerated by these devices. In this work, we propose the idea of an Ising
processing unit as a computational abstraction for reasoning about these
emerging devices. The challenges involved in using and benchmarking these
devices are presented and commercial mixed integer programming solvers are
proposed as a valuable tool for the validation of these disparate hardware
platforms. The proposed validation methodology is demonstrated on a D-Wave 2X
adiabatic quantum computer, one example of an Ising processing unit. The
computational results demonstrate that the D-Wave hardware consistently
produces high-quality solutions and suggests that as IPU technology matures it
could become a valuable co-processor in hybrid-optimization algorithms.
