  The CERN RD50 collaboration develops depleted monolithic active pixel CMOS
sensors for future colliders with the aim of high radiation tolerance, good
time resolution, and high granularity pixel detectors. The most recent
prototype, the RD50-MPW3, is a 150 nm High Voltage CMOS LFoundry chip that
features pixels with a 62 $\mu$m pitch that integrate both digital and analog
readout electronics inside the sensing diodes. The 64 x 64 pixels on this chip
are arranged in 32 double columns and have an optimized periphery for efficient
configuration and fast serial data transmission. Post-layout simulations of a
single pixel show a power consumption of 22 $\mu$W per pixel and 9 ns time
walk. The predecessor of this version, the RD50-MPW2, was shown to match
simulation results in tests at beam facilities and to have a time resolution of
300 ps both before and after irradiation to a fluence of $\Phi_{\mathrm{eq}} =
5\cdot 10^{14}/\mathrm{cm}^2$. This proceeding discusses the design of the
latest advanced prototype, the RD50-MPW3, the first results for the RD50-MPW3,
and the performance of the RD50-MPW2.
