  We examined the effect of backside insulation on the dynamic on-resistance of
lateral p-GaN HEMTs. To gain a comprehensive understanding of the dynamic
onresistance difference between substrate grounded and substrate floating p-GaN
HEMTs, we conducted in-circuit double pulse testing and long-term direct
current (DC) bias stress. We have realized that while backside insulation can
enhance the breakdown voltage of lateral p-GaN HEMTs, it also comes with a
tradeoff in device reliability. Results through Sentaurus TCAD simulation
suggest that the use of backside insulation in devices gradually disperses
potential to the buffer barrier. As a result, the potential barrier at the
buffer edge of the 2DEG channel decreases significantly, leading to
considerable electron trappings at buffer traps. This breakdown voltage and
reliability tradeoff also applies to HEMT technologies using insulating
substrates.
