  Thermal management of integrated circuits (ICs) is important to prevent
thermal hotspots which are the leading cause of IC failure. Thermal management
is even more critical in 3D integrated circuits (3D ICs) as the prevalence of
thermal hotspots is expected to increase due to the presence of polymers and
solder materials that are of low thermal conductivity. Understanding how
thermal conductivity is affected by the presence of these materials is required
for developing thermally aware IC design. The 3{\omega} method can measure
thermal conductivities spanning several orders of magnitude and is appropriate
for measuring the thermal properties of layered structures such as 3D ICs. In
this work, we use the 3{\omega} method with planar and cylindrical heat flow
geometries to determine thermal conductivities of the memory layers and layers
with polymer and solder bumps in High Bandwidth Memory (HBM) Random Access
Memory (RAM). We determine the in-plane thermal conductivity of the memory
layers in HBM as 140 W/m-K, while the through-plane conductivity of the
polymer/solder bump layer is 2 W/m-K. Combining the results of x-ray tomography
and the 3-omega measurements, we estimate that the effective in-plane thermal
conductivity of the overall HBM device is 100 W/m-K while the effective
through-plane thermal conductivity is 7 W/m-K. Our results show that the
presence of polymers and solder metals results in a significantly decreased
through-plane thermal conductivity of a 3D IC compared to a single IC die.
Improvement in the thermal performance of 3D ICs will require improvement in
the thermal conductivity or the increased contact area of the solder metals
used in 3D ICs.
