  This paper proposes an efficient reconfigurable hardware design for speech
enhancement based on multi band spectral subtraction algorithm and involving
both magnitude and phase components. Our proposed design is novel as it
estimates environmental noise from speech adaptively utilizing both magnitude
and phase components of the speech spectrum. We performed multi-band spectrum
subtraction by dividing the noisy speech spectrum into different non-uniform
frequency bands having varying signal to noise ratio (SNR) and subtracting the
estimated noise from each of these frequency bands. This results to the
elimination of noise from both high SNR and low SNR signal components for all
the frequency bands. We have coined our proposed speech enhancement technique
as Multi Band Magnitude Phase Spectral Subtraction (MBMPSS). The magnitude and
phase operations are executed concurrently exploiting the parallel logic blocks
of Field Programmable Gate Array (FPGA), thus increasing the throughput of the
system to a great extent. We have implemented our design on Spartan6 Lx45 FPGA
and presented the implementation result in terms of resource utilization and
delay information for the different blocks of our design. To the best of our
best knowledge, this is a new type of hardware design for speech enhancement
application and also a first of its kind implementation on reconfigurable
hardware. We have used benchmark audio data for the evaluation of the proposed
hardware and the experimental results show that our hardware shows a better SNR
value compared to the existing state of the art research works.
