  This paper describes REAP, a software-hardware approach that enables high
performance sparse linear algebra computations on a cooperative CPU-FPGA
platform. REAP carefully separates the task of organizing the matrix elements
from the computation phase. It uses the CPU to provide a first-pass
re-organization of the matrix elements, allowing the FPGA to focus on the
computation. We introduce a new intermediate representation that allows the CPU
to communicate the sparse data and the scheduling decisions to the FPGA. The
computation is optimized on the FPGA for effective resource utilization with
pipelining. REAP improves the performance of Sparse General Matrix
Multiplication (SpGEMM) and Sparse Cholesky Factorization by 3.2X and 1.85X
compared to widely used sparse libraries for them on the CPU, respectively.
