  We present a massively parallel, 3D phase-field simulation framework for
modeling ferro-electric materials based scalable logic devices. We
self-consistently solve the time-dependent Ginzburg Landau (TDGL) equation for
ferroelectric polarization, Poisson equation for electric potential, and charge
equation for carrier densities in semiconductor regions. The algorithm is
implemented using the AMReX software framework, which provides effective
scalability on manycore and GPU-based supercomputing architectures. We
demonstrate the performance of the algorithm with excellent scaling results on
NERSC multicore and GPU systems, with a significant (15x) speedup on the GPU
using a node-by-node comparison. We further demonstrate the applicability of
the code in simulations of ferroelectric domain-wall induced negative
capacitance (NC) effect in Metal-Ferroelectric-Insulator-Metal (MFIM) and
Metal-Ferroelectric-Insulator-Semiconductor-Metal (MFISM) devices. The charge
(Q) v.s. applied voltage (V) responses for these structures clearly indicates
stabilized negative capacitance.
