  Here we describe the design details and performance of proposed Carry
Propagate Adder based on GDI technique. GDI technique is power efficient
technique for designing digital circuit that consumes less power as compare to
most commonly used CMOS technique. GDI also has an advantage of minimum
propagation delay, minimum area required and less complexity for designing any
digital circuit. We designed Carry Propagate Adder using GDI technique and
compared its performance with CMOS technique in terms of area, delay and power
dissipation. Circuit designed using CADENCE EDA tool and simulated using
SPECTRE VIRTUOSO tool at 0.18m technology. Comparative performance result shows
that Carry Propagate Adder using GDI technique dissipated 55.6% less power as
compare to Carry Propagate Adder using CMOS technique.
