  Modern DAQ systems typically use the FPGA-based PCIe cards to concentrate and
deliver the data to a computer used as an entry node of the data processing
network. This paper presents a QEMU-based methodology for the co-development of
the FPGA-based hardware part, the Linux kernel driver, and the data receiving
application. This approach enables quick verification of the FPGA firmware
architecture, organization of control registers, the functionality of the
driver, and the user-space application. The developed design may be tested in
different emulated architectures with a changeable CPU, IOMMU, size of memory,
and the number of DAQ cards.
