  We demonstrate a sapphire machining process integrated with
intermediate-scale quantum processors. The process allows through-substrate
electrical connections, necessary for low-frequency mode-mitigation, as well as
signal-routing, which are vital as quantum computers scale in qubit number, and
thus dimension. High-coherence qubits are required to build fault-tolerant
quantum computers and so material choices are an important consideration when
developing a qubit technology platform. Sapphire, as a low-loss dielectric
substrate, has shown to support high-coherence qubits. In addition, recent
advances in material choices such as tantalum and titanium-nitride, both
deposited on a sapphire substrate, have demonstrated qubit lifetimes exceeding
0.3 ms. However, the lack of any process equivalent of deep-silicon etching to
create through-substrate-vias in sapphire, or to inductively shunt large dies,
has limited sapphire to small-scale processors, or necessitates the use of
chiplet architecture. Here, we present a sapphire machining process that is
compatible with high-coherence qubits. This technique immediately provides a
means to scale QPUs with integrated mode-mitigation, and provides a route
toward the development of through-sapphire-vias, both of which allow the
advantages of sapphire to be leveraged as well as facilitating the use of
sapphire-compatible materials for large-scale QPUs.
