  Narrow-channel accumulated body nMOSFET devices with p-type side-gates
surrounding the active area have been electrically characterized between 100
and 400 K with varied side-gate biasing (Vside). The subthreshold slope (SS)
and drain induced barrier lowering (DIBL) decrease and threshold voltage (Vt)
increases linearly with reduced temperature and reduced side-gate bias.
Detailed analysis on a 27 nm x 78 nm (width x length) device show SS decreasing
from 115 mV/dec at 400 K to 90 mV/dec at 300 K and down to 36 mV/dec at 100 K,
DIBL decreasing by approximately 10 mV/V for each 100 K reduction in operating
temperature, and Vt increasing from 0.42 V to 0.61 V as the temperature is
reduced from 400 K to 100 K. Vt can be adjusted from ~ 0.3 V to ~ 1.1 V with
~0.3 V/V sensitivity by depletion or accumulation of the body of the device
using Vside. This high level of tunability allows electronic control of Vt and
drive current for variable temperature operation in a wide temperature range
with extremely low leakage currents (< 10-13 A).
