  The paper considers the problem of scheduling software modules on a
multi-core processor, taking into account the limited bandwidth of the data bus
and the precedence constraints. Two problem formulations with different levels
of problem-specific detail are suggested and both shown to be NP-hard. A mixed
integer linear programming (MILP) model is proposed for the first problem
formulation, and a greedy algorithm is developed for the second one. An
experimental comparison of the results of the greedy algorithm and the MILP
solutions found by CPLEX solver is carried out.
