  Spike sorting is essential for extracting neuronal information from neural
signals and understanding brain function. With the advent of high-density
microelectrode arrays (HDMEAs), the challenges and opportunities in
multi-channel spike sorting have intensified. Real-time spike sorting is
particularly crucial for closed-loop brain computer interface (BCI)
applications, demanding efficient hardware implementations. This paper
introduces L-Sort, an hardware design for real-time multi-channel spike
sorting. Leveraging spike localization techniques, L-Sort achieves efficient
spike detection and clustering without the need to store raw signals during
detection. By incorporating median thresholding and geometric features, L-Sort
demonstrates promising results in terms of accuracy and hardware efficiency. We
assessed the detection and clustering accuracy of our design with publicly
available datasets recorded using high-density neural probes (Neuropixel). We
implemented our design on an FPGA and compared the results with state of the
art. Results show that our designs consume less hardware resource comparing
with other FPGA-based spike sorting hardware.
