  Designing complex, multi-million-gate application-specific integrated
circuits requires robust and mature electronic design automation (EDA) tools.
We describe our efforts in enhancing the open-source Yosys+Openroad EDA flow to
implement Basilisk, a fully open-source, Linux-booting RV64GC system-on-chip
(SoC) design. We analyze the quality-of-results impact of our enhancements to
synthesis tools, interfaces between EDA tools, logic optimization scripts, and
a newly open-sourced library of optimized arithmetic macro-operators. We also
introduce a streamlined physical design flow with an improved power grid and
cell placement integration. Our Basilisk SoC design was taped out in IHP's open
130 nm technology. It achieves an operating frequency of 77 MHz (51 logic
levels) under typical conditions, a 2.3x improvement compared to the baseline
open-source EDA flow, while also reducing logic area by 1.6x. Furthermore, tool
runtime was reduced by 2.5x, and peak RAM usage decreased by 2.9x. Through
collaboration with EDA tool developers and domain experts, Basilisk establishes
solid "proof of existence" for a fully open-source EDA flow used in designing a
competitive multi-million-gate digital SoC.
