  In this work, we propose an architecture and methodology to design
hardware/software systems for high-performance embedded computing on FPGA. The
hardware side is based on a many-core architecture whose design is generated
automatically given a set of architectural parameters. Both the architecture
and the methodology were evaluated running dense matrix multiplication and
sparse matrix-vector multiplication on a ZYNQ-7020 FPGA platform. The results
show that using a system-level design of the system avoids complex hardware
design and still provides good performance results.
