  To inform research activities in HPC interconnect of strategic importance to
the USG beyond 2018, in January of 2018, the DoD sponsored the 2nd Photonics
and Electronics Technology for Extreme-scale Computing (REPETE) workgroup.
REPETE investigated new challenges in the area of HPC interconnect inspired by
technology trends and challenges of vital importance to USG stakeholders.
  The REPETE Working group investigated two focus areas of interest to the USG:
Socket Level Photonic IO and Cryogenic Photonic IO. The working group spanned
industry, academia, and government, in research, development, product, and
technology investment areas.
  The workgroup team focusing on current and future design challenges for
socket level photonic IO began discussing technical challenges and current
state of applying photonics to off-chip IO in April of 2019 through biweekly
meetings that concluded in early September of 2019. The focus of these meetings
was to discuss what technology exists for moving the conversion of electrical
signaling to photonic signaling from the node (as is currently done) down to
within the socket for off-chip IO.
  Areas discussed include: I/O Requirements and Trends at the Compute Socket
for 2025 and Beyond; Current and Near-Term Copper Solutions for Off-Chip,
Socket-Level Interconnect; Current Photonic Solutions for Off-Chip or
Socket-Level Interconnect; Light Generation for Off-Chip, Socket-Level IO;
Fabrication and Packaging of Photonic Integrated Circuits; All-Photonic
Switching Technology; and Simulation of Photonic Interconnects.
