  Hardware generators help designers explore families of concrete designs and
their efficiency trade-offs. Both parameterized hardware description languages
(HDLs) and higher-level programming models, however, can obstruct
composability. Different concrete designs in a family can have dramatically
different timing behavior, and high-level hardware generators rarely expose a
consistent HDL-level interface. Composition, therefore, is typically only
feasible at the level of individual instances: the user generates concrete
designs and then composes them, sacrificing the ability to parameterize the
combined design.
  We design Parafil, a system for correctly composing hardware generators.
Parafil builds on Filament, an HDL with strong compile-time guarantees, and
lifts those guarantees to generators to prove that all possible instantiations
are free of timing bugs. Parafil can integrate with external hardware
generators via a novel system of output parameters and a framework for invoking
generator tools. We conduct experiments with two other generators, FloPoCo and
Google's XLS, and we implement a parameterized FFT generator to show that
Parafil ensures correct design space exploration.
