  Compared with silicon (Si) power devices, Silicon carbide (SiC) devices have
the advantages of fast switching speed and low on-resistance. However, the
effects of non-ideal characteristics of SiC MOSFETs and stray parameters
(especially parasitic inductance) on switching losses need to be further
evaluated. In this paper, a transient loss model based on SiC MOSFET and SiC
Schottky barrier diode (SBD) switching pairs is proposed. The transient process
analysis is simplified by time segmentation of the transient process of power
switching devices. The electro-thermal simulation calculates the junction
temperature and updates the temperature-related parameters with the proposed
loss model and the thermal network model. A multi-rate data exchange strategy
is proposed to solve the problem of disparity in timescales between circuit
simulation and thermal network simulation. The CREE CMF20120D SiC MOSFET device
is used for the experimental verification. The experimental results verify the
accuracy of the model which provides guidance for the circuit design of SiC
MOSFETs. All the parameters of the loss model can be extracted from the
datasheet, which is practical in power electronics design.
