  FPGAs have found their way into data centers as accelerator cards, making
reconfigurable computing more accessible for high-performance applications. At
the same time, new high-level synthesis compilers like Xilinx Vitis and runtime
libraries such as XRT attract software programmers into the reconfigurable
domain. While software programmers are familiar with task-level and
data-parallel programming, FPGAs often require different types of parallelism.
For example, data-driven parallelism is mandatory to obtain satisfactory
hardware designs for pipelined dataflow architectures. However, software
programmers are often not acquainted with dataflow architectures - resulting in
poor hardware designs.
  In this work we present FLOWER, a comprehensive compiler infrastructure that
provides automatic canonical transformations for high-level synthesis from a
domain-specific library. This allows programmers to focus on algorithm
implementations rather than low-level optimizations for dataflow architectures.
We show that FLOWER allows to synthesize efficient implementations for
high-performance streaming applications targeting System-on-Chip and FPGA
accelerator cards, in the context of image processing and computer vision.
