  A non-relaxing method based on cyclic gate bias stress is used to probe the
interface or near-interface traps in the SiO$_2$/4H-SiC system over the whole
4H-SiC band gap. The temperature dependent instability of the threshold voltage
in lateral MOSFETs is investigated and two separated trapping mechanisms were
found. One mechanism is nearly temperature independent and it is correlated to
the presence of near interface oxide traps that are trapped via tunneling from
the semiconductor. The second mechanism, having an activation energy of 0.1 eV,
has been correlated to the presence of intrinsic defects at the SiO$_2$/4H-SiC
interface.
