  Unrolling a decoding algorithm allows to achieve extremely high throughput at
the cost of increased area. Look-up tables (LUTs) can be used to replace
functions otherwise implemented as circuits. In this work, we show the impact
of replacing blocks of logic by carefully crafted LUTs in unrolled decoders for
polar codes. We show that using LUTs to improve key performance metrics (e.g.,
area, throughput, latency) may turn out more challenging than expected. We
present three variants of LUT-based decoders and describe their inner workings
as well as circuits in detail. The LUT-based decoders are compared against a
regular unrolled decoder, employing fixed-point representations for numbers,
with a comparable error-correction performance. A short systematic polar code
is used as an illustration. All resulting unrolled decoders are shown to be
capable of an information throughput of little under 10 Gbps in a 28 nm FD-SOI
technology clocked in the vicinity of 1.4 GHz to 1.5 GHz. The best variant of
our LUT-based decoders is shown to reduce the area requirements by 23% compared
to the regular unrolled decoder while retaining a comparable error-correction
performance.
