  Thermodynamic RAM (kT-RAM) is a neuromemristive co-processor design based on
the theory of AHaH Computing and implemented via CMOS and memristors. The
co-processor is a 2-D array of differential memristor pairs (synapses) that can
be selectively coupled together (neurons) via the digital bit addressing of the
underlying CMOS RAM circuitry. The chip is designed to plug into existing
digital computers and be interacted with via a simple instruction set.
Anti-Hebbian and Hebbian (AHaH) computing forms the theoretical framework from
which a nature-inspired type of computing architecture is built where, unlike
von Neumann architectures, memory and processor are physically combined for
synaptic operations. Through exploitation of AHaH attractor states,
memristor-based circuits converge to attractor basins that represents machine
learning solutions such as unsupervised feature learning, supervised
classification and anomaly detection. Because kT-RAM eliminates the need to
shuttle bits back and forth between memory and processor and can operate at
very low voltage levels, it can significantly surpass CPU, GPU, and FPGA
performance for synaptic integration and learning operations. Here, we present
a memristor technology developed for use in kT-RAM, in particular
bi-directional incremental adaptation of conductance via short low-voltage 1.0
V, 1.0 microsecond pulses.
