  A merged-element transmon (MET) device, based on silicon (Si) fins, is
proposed and the first steps to form such a "FinMET" are demonstrated. This new
application of fin technology capitalizes on the anisotropic etch of Si(111)
relative to Si(110) to define atomically flat, high aspect ratio Si tunnel
barriers with epitaxial superconductor contacts on the parallel side-wall
surfaces. This process circumvents the challenges associated with the growth of
low-loss insulating barriers on lattice matched superconductors. By
implementing low-loss, intrinsic float-zone Si as the barrier material rather
than commonly used, potentially lossy AlOx, the FinMET is expected to overcome
problems with standard transmons by (1) reducing dielectric losses, (2)
minimizing the formation of two-level system spectral features, (3) exhibiting
greater control over barrier thickness and qubit frequency spread, especially
when combined with commercial fin fabrication and atomic-layer digital etching;
(4) potentially reducing the footprint by several orders of magnitude; and (5)
allowing scalable fabrication. Here, as a first step to making such a device,
the fabrication of Si fin capacitors on Si(110) substrates with
shadow-deposited Al electrodes is demonstrated. These fin capacitors are then
fabricated into lumped element resonator circuits and probed using
low-temperature microwave measurements. Further thinning of silicon junctions
towards the tunneling regime will enable the scalable fabrication of FinMET
devices based on existing silicon technology, while simultaneously avoiding
lossy amorphous dielectrics for the tunnel barriers.
