  Achieving dense connectivities is a challenge for most quantum computing
platforms today, and a particularly crucial one for the case of quantum
annealing applications. In this context, we present a scalable architecture for
quantum annealers described by a hardware graph of degree $d=3$ and containing
exclusively 2-local interactions to realize Ising models of arbitrary
dimension. By describing the problem graph in terms of triangles, we derive
this resource-efficient configuration based on logical chains of qubits. We
also devise strategies to address the challenges of scaling this architecture,
identifying driver Hamiltonians more suited to the symmetries of the logical
solution space. We thus show a promising new route to scale up devices
dedicated to classical optimization tasks within the quantum annealing
paradigm.
