  Existing compact models for memristive devices (including RRAM and CBRAM) all
suffer from issues related to mathematical ill-posedness and/or improper
implementation. This limits their value for simulation and design and in some
cases, results in qualitatively unphysical predictions. We identify the causes
of ill-posedness in these models. We then show how memristive devices in
general can be modelled using only continuous/smooth primitives in such a way
that they always respect physical bounds for filament length and also feature
well-defined and correct DC behaviour. We show how to express these models
properly in languages like Verilog-A and ModSpec (MATLAB). We apply these
methods to correct previously published RRAM and memristor models and make them
well posed. The result is a collection of memristor models that may be dubbed
"simulation-ready", i.e., that feature the right physical characteristics and
are suitable for robust and consistent simulation in DC, AC, transient, etc.,
analyses. We provide implementations of these models in both ModSpec/MATLAB and
Verilog-A.
