  Power analysis is a branch of side channel attacks where power consumption
data is used as the side channel to attack the system. First using a device
like an oscilloscope power traces are collected when the cryptographic device
is doing the cryptographic operation. Then those traces are statistically
analysed using methods such as Correlation Power Analysis (CPA) to derive the
secret key of the system. Being possible to break Advanced Encryption Standard
(AES) in few minutes, power analysis attacks have become a serious security
issue for cryptographic devices such as smart card.
  As the first phase of our project, we build a testbed for doing research on
power analysis attacks. As power analysis is a practical type of attack in
order to do any research, a testbed is the first requirement. Since building a
test bed is a complicated process, having a pre-built testbed would save the
time of future researchers. The second phase of our project is to attack the
latest cryptographic algorithm called Speck which has been released by National
Security Agency (NSA) for use in embedded systems. In spite it has lot of
differences to AES making impossible to directly use the power analysis
approach used for AES, we introduce novel approaches to break Speck in less
than an hour. In the third phase of the project, we select few already
introduced countermeasures and practically attack them on our testbed to do a
comparative analysis. We show that software countermeasures such as random
instruction injection and randomly shuffling S-boxes are good enough for their
simplicity and cost. But we identify the possible threat due to the problem of
generating a good seed for the pseudo-random algorithm running on the
microcontroller. We attempt to address this issue by using a hardware-based
true random generator that amplifies a random electrical signal and samples to
generate a proper seed.
