  Successive cancellation list (SCL) decoding algorithm is a powerful method
that can help polar codes achieve excellent error-correcting performance.
However, the current SCL algorithm and decoders are based on likelihood or
log-likelihood forms, which render high hardware complexity. In this paper, we
propose a log-likelihood-ratio (LLR)-based SCL (LLR-SCL) decoding algorithm,
which only needs half the computation and storage complexity than the
conventional one. Then, based on the proposed algorithm, we develop
low-complexity VLSI architectures for LLR-SCL decoders. Analysis results show
that the proposed LLR-SCL decoder achieves 50% reduction in hardware and 98%
improvement in hardware efficiency.
