  The P4 community has recently put significant effort to increase the
diversity of targets on which P4 programs can be implemented. These include
fixed function and programmable ASICs, FPGAs, NICs, and CPUs. However, P4
programs are written according to the set of functionalities supported by the
target for which they are compiled. For instance, a P4 program targeting a
programmable ASIC cannot be extended with user-defined processing modules,
which limits the flexibility and the abstraction of P4 programs.
  To address these shortcomings, we propose a heterogeneous P4 programmable
data plane comprised of different targets that together appear as a single
logical unit. The proposed data plane broadens the range of functionalities
available to P4 programmers by combining the strength of each target. We
demonstrate the feasibility of the proposed P4 data plane by coupling an FPGA
with a soft switch which emulates a programmable ASIC. The proposed data plane
is demonstrated with the implementation of a simplified L2 switch. The emulated
ASIC match-table capacity is extended by the FPGA by an order of magnitude.The
FPGA also integrates a proprietary module using a P4 extern.
