  Electromigration (EM) is one of the major concerns in the reliability
analysis of very large scale integration (VLSI) systems due to the continuous
technology scaling. Accurately predicting the time-to-failure of integrated
circuits (IC) becomes increasingly important for modern IC design. However,
traditional methods are often not sufficiently accurate, leading to undesirable
over-design especially in advanced technology nodes. In this paper, we propose
an approach using multilayer perceptrons (MLP) to compute stress evolution in
the interconnect trees during the void nucleation phase. The availability of a
customized trial function for neural network training holds the promise of
finding dynamic mesh-free stress evolution on complex interconnect trees under
time-varying temperatures. Specifically, we formulate a new objective function
considering the EM-induced coupled partial differential equations (PDEs),
boundary conditions (BCs), and initial conditions to enforce the physics-based
constraints in the spatial-temporal domain. The proposed model avoids meshing
and reduces temporal iterations compared with conventional numerical approaches
like FEM. Numerical results confirm its advantages on accuracy and
computational performance.
