  5G Radio access network disaggregation and softwarization pose challenges in
terms of computational performance to the processing units. At the physical
layer level, the baseband processing computational effort is typically
offloaded to specialized hardware accelerators. However, the trend toward
software-defined radio-access networks demands flexible, programmable
architectures. In this paper, we explore the software design, parallelization
and optimization of the key kernels of the lower physical layer (PHY) for
physical uplink shared channel (PUSCH) reception on MemPool and TeraPool, two
manycore systems having respectively 256 and 1024 small and efficient RISC-V
cores with a large shared L1 data memory. PUSCH processing is demanding and
strictly time-constrained, it represents a challenge for the baseband
processors, and it is also common to most of the uplink channels. Our analysis
thus generalizes to the entire lower PHY of the uplink receiver at gNodeB
(gNB). Based on the evaluation of the computational effort (in
multiply-accumulate operations) required by the PUSCH algorithmic stages, we
focus on the parallel implementation of the dominant kernels, namely fast
Fourier transform, matrix-matrix multiplication, and matrix decomposition
kernels for the solution of linear systems. Our optimized parallel kernels
achieve respectively on MemPool and TeraPool speedups of 211, 225, 158, and
762, 880, 722, at high utilization (0.81, 0.89, 0.71, and 0.74, 0.88, 0.71),
comparable a single-core serial execution, moving a step closer toward a
full-software PUSCH implementation.
