  ML models are increasingly being used to increase the test coverage and
decrease the overall testing time. This field is still in its nascent stage and
up till now there were no algorithms that could match or outperform commercial
tools in terms of speed and accuracy for large circuits. We propose an ATPG
algorithm HybMT in this paper that finally breaks this barrier. Like sister
methods, we augment the classical PODEM algorithm that uses recursive
backtracking. We design a custom 2-level predictor that predicts the input net
of a logic gate whose value needs to be set to ensure that the output is a
given value (0 or 1). Our predictor chooses the output from among two
first-level predictors, where the most effective one is a bespoke neural
network and the other is an SVM regressor. As compared to a popular,
state-of-the-art commercial ATPG tool, HybMT shows an overall reduction of
56.6% in the CPU time without compromising on the fault coverage for the EPFL
benchmark circuits. HybMT also shows a speedup of 126.4% over the best ML-based
algorithm while obtaining an equal or better fault coverage for the EPFL
benchmark circuits.
