  Spiking neural networks (SNNs) are brain-inspired mathematical models with
the ability to process information in the form of spikes. SNNs are expected to
provide not only new machine-learning algorithms, but also energy-efficient
computational models when implemented in VLSI circuits. In this paper, we
propose a novel supervised learning algorithm for SNNs based on temporal
coding. A spiking neuron in this algorithm is designed to facilitate analog
VLSI implementations with analog resistive memory, by which ultra-high energy
efficiency can be achieved. We also propose several techniques to improve the
performance on a recognition task, and show that the classification accuracy of
the proposed algorithm is as high as that of the state-of-the-art temporal
coding SNN algorithms on the MNIST dataset. Finally, we discuss the robustness
of the proposed SNNs against variations that arise from the device
manufacturing process and are unavoidable in analog VLSI implementation. We
also propose a technique to suppress the effects of variations in the
manufacturing process on the recognition performance.
