  The lower order harmonic elimination using space vector pulse width
modulation (SVPWM) technique is possible by introducing the dwell time division
coefficient 'k' in space vector. In this paper, torque ripple analysis is
carried out for space vector based harmonic elimination (SVHE) scheme and the
obtained results are compared with the existing schemes such as conventional
and advanced bus clamping SVPWM schemes. Further, the obtained results are
validated through simulation results. The SVHE scheme gives the lower torque
ripple than the conventional and advance bus clamping schemes at higher
modulation indices.
