  Based on the two observations that diverse applications perform better on
different multicore architectures, and that different phases of an application
may have vastly different resource requirements, Pal et al. proposed a novel
reconfigurable hardware approach for executing multithreaded programs. Instead
of mapping a concurrent program to a fixed architecture, the architecture
adaptively reconfigures itself to meet the application's concurrency and
communication requirements, yielding significant improvements in performance.
Based on our earlier abstract operational framework for multicore execution
with hierarchical memory structures, we describe execution of multithreaded
programs on reconfigurable architectures that support a variety of clustered
configurations. Such reconfiguration may not preserve the semantics of programs
due to the possible introduction of race conditions arising from concurrent
accesses to shared memory by threads running on the different cores. We present
an intuitive partial ordering notion on the cluster configurations, and show
that the semantics of multithreaded programs is always preserved for
reconfigurations "upward" in that ordering, whereas semantics preservation for
arbitrary reconfigurations can be guaranteed for well-synchronised programs. We
further show that a simple approximate notion of efficiency of execution on the
different configurations can be obtained using the notion of amortised
bisimulations, and extend it to dynamic reconfiguration.
