  An experimental digital correlated double sampler (DCDS) video processor has
been implemented in a Xilinx Artix FPGA. It uses an Opal Kelly XEM7010-A50
module that comes with an integrated USB2 interface for easy interfac-ing to a
data acquisition PC. The FPGA has been coupled to a dual 16-bit 20Msps ADC and
video preamplifiers. A synthetic CCD video waveform was provided by a high
speed DAC also under FPGA control. VHDL-defined hardware implemented the
differential averager algorithm which has been shown to give the optimal signal
to noise ratio over a wide range of readout speeds. Hardware developed in this
project is intended for eventual integration into a Xilinx Zynq-based system
that combines the functionality of both a CCD controller and Linux-based data
acquisition system.
