  With recent trend of wearable devices and Internet of Things (IoTs), it
becomes attractive to develop hardware-based deep convolutional neural networks
(DCNNs) for embedded applications, which require low power/energy consumptions
and small hardware footprints. Recent works demonstrated that the Stochastic
Computing (SC) technique can radically simplify the hardware implementation of
arithmetic units and has the potential to satisfy the stringent power
requirements in embedded devices. However, in these works, the memory design
optimization is neglected for weight storage, which will inevitably result in
large hardware cost. Moreover, if conventional volatile SRAM or DRAM cells are
utilized for weight storage, the weights need to be re-initialized whenever the
DCNN platform is re-started.
  In order to overcome these limitations, in this work we adopt an emerging
non-volatile Domain-Wall Memory (DWM), which can achieve ultra-high density, to
replace SRAM for weight storage in SC-based DCNNs. We propose DW-CNN, the first
comprehensive design optimization framework of DWM-based weight storage method.
We derive the optimal memory type, precision, and organization, as well as
whether to store binary or stochastic numbers. We present effective resource
sharing scheme for DWM-based weight storage in the convolutional and
fully-connected layers of SC-based DCNNs to achieve a desirable balance among
area, power (energy) consumption, and application-level accuracy.
