  With the rapid development of scientific computation, more and more
researchers and developers are committed to implementing various
workloads/operations on different devices. Among all these devices, NVIDIA GPU
is the most popular choice due to its comprehensive documentation and excellent
development tools. As a result, there are abundant resources for hand-writing
high-performance CUDA codes. However, CUDA is mainly supported by only
commercial products and there has been no support for open-source H/W
platforms. RISC-V is the most popular choice for hardware ISA, thanks to its
elegant design and open-source license. In this project, we aim to utilize
these existing CUDA codes with RISC-V devices. More specifically, we design and
implement a pipeline that can execute CUDA source code on an RISC-V GPU
architecture. We have succeeded in executing CUDA kernels with several
important features, like multi-thread and atomic instructions, on an RISC-V GPU
architecture.
