  The extremely high carrier mobility and the unique band structure, make
graphene very useful for field-effect transistor applications. According to
several works, the primary limitation to graphene based transistor performance
is not related to the material quality, but to extrinsic factors that affect
the electronic transport properties. One of the most important parasitic
element is the contact resistance appearing between graphene and the metal
electrodes functioning as the source and the drain. Ohmic contacts to graphene,
with low contact resistances, are necessary for injection and extraction of
majority charge carriers to prevent transistor parameter fluctuations caused by
variations of the contact resistance. The International Technology Roadmap for
Semiconductors, toward integration and down-scaling of graphene electronic
devices, identifies as a challenge the development of a CMOS compatible process
that enables reproducible formation of low contact resistance. However, the
contact resistance is still not well understood despite it is a crucial barrier
towards further improvements. In this paper, we review the experimental and
theoretical activity that in the last decade has been focusing on the reduction
of the contact resistance in graphene transistors. We will summarize the
specific properties of graphene-metal contacts with particular attention to the
nature of metals, impact of fabrication process, Fermi level pinning, interface
modifications induced through surface processes, charge transport mechanism,
and edge contact formation.
