  A numerical simulation of spin-dependent quantum transport for a spin field
effect transistor (spinFET) is implemented in a widely used simulator nanoMOS.
This method includes the effect of both spin relaxation in the channel and the
tunneling barrier between the source/drain and the channel. Account for these
factors permits setting more realistic performance limits for the transistor,
especially the magnetoresistance, which is found to be lower compared to
earlier predictions. The interplay between tunneling and spin relaxation is
elucidated by numerical simulation. Insertion of the tunneling barrier leads to
an increased magnetoresistance. Numerical simulations are used to explore the
tunneling barrier design issues.
