  The aim of this study is to design and evaluate a simple free running
Analog-Digital Converter (ADC) based on the Field Programmable Gate Array
(FPGA) device to accomplish the energy and position readout of the silicon
photomultiplier (SiPM) array for application as PET scanners. This simple
FPGA-ADC based on a carry chain Time-Digital Converter (TDC) implemented on a
Kintex-7 FPGA consists of only one off-chip resistor so it has greater
advantages in improving system integration and reducing cost than commercial
chips. In this paper, a FPGA-ADC based front-end electronics prototype is
presented, and both the design principle and implementation considerations are
discussed. Experiments were performed using an 8 x 8 (crystal size: 4 x 4 x 15
mm3 ) and a 12 x 12 (crystal size: 2.65 x2.65 x 15 mm3 ) segmented LYSO
crystals coupled with an 8 x 8 SiPM (Jseries, from ON Semiconductor) array
which is under 22Na point source excitation. Initial test results indicate that
the energy resolution of the two detectors after correction is around 13.2% and
13.5 % at 511 keV, and the profiles of the flood histograms show a clear
visualization of the discrete scintillator element. All measurements were
carried out at room temperature (~25 degree), without additional cooling
