  Early but promising results in quantum computing have been enabled by the
concurrent development of quantum algorithms, devices, and materials. Classical
simulation of quantum programs has enabled the design and analysis of
algorithms and implementation strategies targeting current and anticipated
quantum device architectures. In this paper, we present a graph-based approach
to achieve efficient quantum circuit simulation. Our approach involves
partitioning the graph representation of a given quantum circuit into acyclic
sub-graphs/circuits that exhibit better data locality. Simulation of each
sub-circuit is organized hierarchically, with the iterative construction and
simulation of smaller state vectors, improving overall performance. Also, this
partitioning reduces the number of passes through data, improving the total
computation time. We present three partitioning strategies and observe that
acyclic graph partitioning typically results in the best time-to-solution. In
contrast, other strategies reduce the partitioning time at the expense of
potentially increased simulation times. Experimental evaluation demonstrates
the effectiveness of our approach.
