  The electrical transport properties of epitaxial graphene layers are
correlated with the SiC surface morphology. In this study we show by atomic
force microscopy and Raman measurements that the surface morphology and the
structure of the epitaxial graphene layers change significantly when different
pretreatment procedures are applied to nearly on-axis 6H-SiC(0001) substrates.
It turns out that the often used hydrogen etching of the substrate is
responsible for undesirable high macro steps evolving during graphene growth. A
more advantageous type of sub-nanometer stepped graphene layers is obtained
with a new method: a high-temperature conditioning of the SiC surface in argon
atmosphere. The results can be explained by the observed graphene buffer layer
domains after the conditioning process which suppress giant step bunching and
graphene step flow growth. The superior electronic quality is demonstrated by a
less extrinsic resistance anisotropy obtained in nano-probe transport
experiments and by the excellent quantization of the Hall resistance in
low-temperature magneto-transport measurements. The quantum Hall resistance
agrees with the nominal value (half of the von Klitzing constant) within a
standard deviation of 4.5*10(-9) which qualifies this method for the
fabrication of electrical quantum standards.
