  As the Internet-of-Things (IoT) applications become more and more pervasive,
IoT end nodes are requiring more and more computational power within a few mW
of power envelope, coupled with high-speed and energy-efficient inter-chip
communication to deal with the growing input/output and memory bandwidth for
emerging near-sensor analytics applications. While traditional interfaces such
as SPI cannot cope with these tight requirements, low-voltage swing
transceivers can tackle this challenge thanks to their capability to achieve
several Gbps of bandwidth at extremely low power. However, recent research on
high-speed serial links addressed this challenge only partially, proposing only
partial or stand-alone designs, and not addressing their integration in real
systems and the related implications. In this paper, we present for the first
time a complete design and system-level architecture of a low-voltage swing
transceiver integrated within a low-power (mW range) IoT end-node processors,
and we compare it with existing microcontroller interfaces. The transceiver,
implemented in a commercial 65-nm CMOS technology achieves 10.2x higher energy
efficiency at 15.7x higher performance than traditional microcontroller
peripherals (single lane).
