  The validation process for microprocessors is a very complex task that
consumes substantial engineering time during the design process. Bugs that
degrade overall system performance, without affecting its functional
correctness, are particularly difficult to debug given the lack of a golden
reference for bug-free performance. This work introduces two automated
performance bug localization methodologies based on machine learning that aims
to aid the debugging process. Our results show that, the evaluated
microprocessor core performance bugs whose average IPC impact is greater than
1%, our best-performing technique is able to localize the exact
microarchitectural unit of the bug $\sim$77\% of the time, while achieving a
top-3 unit accuracy (out of 11 possible locations) of over 90% for bugs with
the same average IPC impact. The proposed system in our simulation setup
requires only a few seconds to perform a bug location inference, which leads to
a reduced debugging time.
