  This paper investigates the relationship between mapping style and device
roadmap in Resistive Random Access Memory (ReRAM) architectures for
neuromorphic computing. The study leverages simulations using DNN+NeuroSim to
evaluate the impact of different parameters on chip performance, including
latency, energy consumption, and overall system efficiency. The results
demonstrate that novel mapping techniques and a high-performance (HP) device
roadmap are optimal if energy and speed considerations are weighted equally.
This is because as the study demonstrates, HP devices provide a latency cut
that outsizes the energy cost. Additionally, adopting novel mapping in the
device cuts latency by nearly 30% while being slightly more energy efficient.
The findings highlight the importance of considering mapping style and device
roadmap in optimizing ReRAM architectures for neuromorphic computing, which may
contribute to advancing the practical implementation of ReRAM in computational
systems.
