  DASH is a library of distributed data structures and algorithms designed for
running the applications on modern HPC architectures, composed of hierarchical
network interconnections and stratified memory. DASH implements a PGAS
(partitioned global address space) model in the form of C++ templates, built on
top of DART -- a run-time system with an abstracted tier above existing
one-sided communication libraries.
  In order to facilitate the application development process for exploiting the
hierarchical organization of HPC machines, DART allows to reorder the placement
of the computational units. In this paper we present an automatic, hierarchical
units mapping technique (using a similar approach to the Hilbert curve
transformation) to reorder the placement of DART units on the Cray XC40 machine
Hazel Hen at HLRS. To evaluate the performance of new units mapping which takes
into the account the topology of allocated compute nodes, we perform latency
benchmark for a 3D stencil code. The technique of units mapping is generic and
can be be adopted in other DART communication substrates and on other hardware
platforms.
  Furthermore, high--level features of DASH are presented, enabling more
complex automatic transformations and optimizations in the future.
