  Conventional in-memory computing (IMC) architectures consist of analog
memristive crossbars to accelerate matrix-vector multiplication (MVM), and
digital functional units to realize nonlinear vector (NLV) operations in deep
neural networks (DNNs). These designs, however, require energy-hungry signal
conversion units which can dissipate more than 95% of the total power of the
system. In-Memory Analog Computing (IMAC) circuits, on the other hand, remove
the need for signal converters by realizing both MVM and NLV operations in the
analog domain leading to significant energy savings. However, they are more
susceptible to reliability challenges such as interconnect parasitic and noise.
Here, we introduce a practical approach to deploy large matrices in DNNs onto
multiple smaller IMAC subarrays to alleviate the impacts of noise and
parasitics while keeping the computation in the analog domain.
