  Efficient delivery of current from PCB to point-of-load (POL) is a primary
concern in modern high-power high-density integrated systems. Traditionally, a
48 V power signal is converted to the low, POL voltage at the board and/or
package level. As interconnect has become the dominant power loss component,
minimizing voltage drop across the laterally routed portions of the
board-to-die interconnect (referred to as horizontal interconnect) is a
promising approach to enhance the efficiency of the power delivery system.
Delivering lower current vertically, at a higher voltage should therefore be
considered. High-power conversion near POL, however, results in higher
switching and inductor losses, exhibiting an undesired power efficiency
tradeoff. To address this problem, four vertical power delivery architectures
are proposed in this paper, considering state-of-the-art power converter
topologies, integration levels, and voltage conversion schemes. Embedding
Silicon (Si) and Gallium Nitride (GaN) power devices and inductors on top of
and/or within the interposer is investigated. Integrating GaN power devices on
a dedicated power die is also discussed. Various multi-stage 48V-to-1V power
conversion schemes are examined and state-of-the-art power conversion circuits
are reviewed. Power delivery characteristics with these architectures are
determined for a high power (1 kW) high-current density (2 A/mm$^2$) system.
