  In this document, we develop a structured approach to the management of HPC
resilience based on the concept of resilience-based design patterns. A design
pattern is a general repeatable solution to a commonly occurring problem. We
identify the commonly occurring problems and solutions used to deal with
faults, errors and failures in HPC systems. The catalog of resilience design
patterns provides designers with reusable design elements. We define a design
framework that enhances our understanding of the important constraints and
opportunities for solutions deployed at various layers of the system stack. The
framework may be used to establish mechanisms and interfaces to coordinate
flexible fault management across hardware and software components. The
framework also enables optimization of the cost-benefit trade-offs among
performance, resilience, and power consumption. The overall goal of this work
is to enable a systematic methodology for the design and evaluation of
resilience technologies in extreme-scale HPC systems that keep scientific
applications running to a correct solution in a timely and cost-efficient
manner in spite of frequent faults, errors, and failures of various types.
