  Time plays a crucial role in the performance of computing systems. The
accurate modelling of logical devices, and of their physical implementations,
requires an appropriate representation of time and of all properties that
depend on this notion. The need for a proper model, particularly acute in the
design of clockless delay-insensitive (DI) circuits, leads one to reconsider
the classical descriptions of time and of the resulting order and causal
relations satisfied by logical operations. This questioning meets the
criticisms of classical spacetime formulated by Einstein when founding
relativity theory and is answered by relativistic conceptions of time and
causality. Applying this approach to clockless circuits and considering the
trace formalism, we rewrite Udding's rules which characterize communications
between DI components. We exhibit their intrinsic relation with relativistic
causality. For that purpose, we introduce relativistic generalizations of
traces, called R-traces, which provide a pertinent description of
communications and compositions of DI components.
