  The objective of this paper is to design and implement an intelligent Traffic
Light Controller system for a four way road intersection. The design is carried
out using Verilog, and the hardware is implemented on a FPGA. The chosen
intersection involves a 'main road' (heavy traffic flow) and a 'side road'
(less traffic flow), which is equipped with sensors to detect the presence of
traffic or pedestrians. The functionality of the system has undergone thorough
verification through simulations conducted in the Xilinx ISE Design Studio
software environment. Furthermore, it has been physically deployed on a Xilinx
Spartan-3E FPGA board xc3s500e-4-fg320. A traffic light controller can be
realized through the use of a microcontroller, Application-Specific Integrated
Circuits (ASICs), or Field-Programmable Gate Arrays (FPGAs). FPGAs however
offer significant advantages in terms of re-programmability, speed, and
parallel processing capabilities, making them ideally suited for implementing
complex, adaptive logic required by smart traffic management systems; thus,
making this model of TLC extremely adaptive and cost efficient at the same time
as compared to other existing models with reduced hardware usage and delay
constraints.
