  Computation intensive kernels, such as convolutions, matrix multiplication
and Fourier transform, are fundamental to edge-computing AI, signal processing
and cryptographic applications. Interleaved-Multi-Threading (IMT) processor
cores are interesting to pursue energy efficiency and low hardware cost for
edge-computing, yet they need hardware acceleration schemes to run heavy
computational workloads. Following a vector approach to accelerate
computations, this study explores possible alternatives to implement vector
coprocessing units in RISC-V cores, showing the synergy between IMT and
data-level parallelism in the target workloads.
