  Most recently, there has been a flurry of research activities on studying how
massive MIMO precoding should be designed when the digital-to-analog conversion
at the transmitter side is operated by cheap one-bit digital-to-analog
converters (DACs). Such research is motivated by the desire to substantially
cut down the hardware cost and power consumption of the radio-frequency chain,
which is unaffordable in massive MIMO if high-resolution DACs are still used.
One-bit MIMO precoding design problems are much harder to solve than their
high-resolution DAC counterparts. In our previous work, we developed a minimum
symbol-error probability (SEP) design for one-bit precoding under the multiuser
MISO downlink scenario and under quadrature amplitude modulation signaling.
Leveraging on the previous work, this work shows how the minimum SEP design is
applied to M-ary phase shift keying (MPSK) signaling. Simulation results show
that our minimum SEP design delivers significantly better bit-error rate (BER)
performance than the other designs for higher-order PSK such as 8-PSK and
16-PSK. As a minor, but useful, side contribution, we also tackle an MPSK SEP
characterization problem which was only intuitively treated in the prior arts.
