  Multi-Level Intermediate Representation (MLIR) is gaining increasing
attention in reconfigurable hardware communities due to its capability to
represent various abstract levels for software compilers. This project aims to
be the first to provide an end-to-end framework that leverages open-source,
cross-platform compilation technology to generate MLIR from SYCL. Additionally,
it aims to explore a lowering pipeline that converts MLIR to RTL using
open-source hardware intermediate representation (IR) and compilers.
Furthermore, it aims to couple the generated hardware module with the host CPU
using vendor-specific crossbars. Our preliminary results demonstrated the
feasibility of lowering customized MLIR to RTL, thus paving the way for an
end-to-end compilation.
