  In dataflow representations for signal processing systems, applications are
represented as directed graphs in which vertices represent computations and
edges correspond to buffers that store data as it passes between computations.
The buffers are single-input, single-output components that manage data in a
first-in, first-out (FIFO) fashion. In this paper, we generalize the concept of
dataflow buffers with a concept called "passive blocks". Like dataflow buffers,
passive blocks are used to store data during the intervals between its
generation by producing actors, and its use by consuming actors. However,
passive blocks can have multiple inputs and multiple outputs, and can
incorporate operations on and rearrangements of the stored data subject to
certain constraints. We define a form of flowgraph representation that is based
on replacing dataflow edges with the proposed concept of passive blocks. We
present a structured design methodology for utilizing this new form of signal
processing flowgraph, and demonstrate its utility in improving memory
management efficiency, and execution time performance.
