  We present new computational building blocks based on memristive devices.
These blocks, can be used to implement either supervised or unsupervised
learning modules. This is achieved using a crosspoint architecture which is an
efficient array implementation for nanoscale two-terminal memristive devices.
Based on these blocks and an experimentally verified SPICE macromodel for the
memristor, we demonstrate that firstly, the Spike-Timing-Dependent Plasticity
(STDP) can be implemented by a single memristor device and secondly, a
memristor-based competitive Hebbian learning through STDP using a $1\times
1000$ synaptic network. This is achieved by adjusting the memristor's
conductance values (weights) as a function of the timing difference between
presynaptic and postsynaptic spikes. These implementations have a number of
shortcomings due to the memristor's characteristics such as memory decay,
highly nonlinear switching behaviour as a function of applied voltage/current,
and functional uniformity. These shortcomings can be addressed by utilising a
mixed gates that can be used in conjunction with the analogue behaviour for
biomimetic computation. The digital implementations in this paper use in-situ
computational capability of the memristor.
