  Network switches and routers need to serve packet writes and reads at rates
that challenge the most advanced memory technologies. As a result, scaling the
switching rates is commonly done by parallelizing the packet I/Os using
multiple memory units. For improved read rates, packets can be coded with an
[n,k] MDS code, thus giving more flexibility at read time to achieve higher
utilization of the memory units. In the paper, we study the usage of [n,k] MDS
codes in a switching environment. In particular, we study the algorithmic
problem of maximizing the instantaneous read rate given a set of packet
requests and the current layout of the coded packets in memory. The most
interesting results from practical standpoint show how the complexity of
reaching optimal read rate depends strongly on the writing policy of the coded
packets.
