  A Content Addressable Memory (CAM) is a memory primarily designed for high
speed search operation. Parallel search scheme forms the basis of CAM, thus
power reduction is the challenge associated with a large amount of parallel
active circuits. We are presenting a novel algorithm and architecture described
as Selective Match-Line Energizer Content Addressable Memory (SMLE-CAM) which
energizes only those MLs (Match-Line) whose first three bits are conditionally
matched with corresponding first three search bit using special architecture
which comprises of novel XNOR-CAM cell and novel XOR-CAM cell. The rest of the
CAM chain is followed by NOR-CAM cell. The 256 X 144 bit SMLE-CAM is
implemented in TSMC 90 nm technology and its robustness across PVT variation is
verified. The post-layout simulation result shows, it has energy metric of
0.115 fJ/bit/search with search time 361.6 ps, the best reported so far. The
maximum operating frequency is 1GHz.
