  State of the art detector readout electronics require high-throughput data
acquisition (DAQ) systems. In many applications, e. g. for medical imaging, the
front-end electronics are set up as separate modules in a distributed DAQ. A
standardized interface between the modules and a central data unit is
essential. The requirements on such an interface are varied, but demand almost
always a high throughput of data. Beyond this challenge, a Gigabit Ethernet
interface is predestined for the broad requirements of Systems-on-a-Chip (SoC)
up to large-scale DAQ systems. We have implemented an embedded protocol stack
for a Field Programmable Gate Array (FPGA) capable of high-throughput data
transmission and clock synchronization. A versatile stack architecture for the
User Datagram Protocol (UDP) and Internet Control Message Protocol (ICMP) over
Internet Protocol (IP) such as Address Resolution Protocol (ARP) as well as
Precision Time Protocol (PTP) is presented. With a point-to-point connection to
a host in a MicroTCA system we achieved the theoretical maximum data throughput
limited by UDP both for 1000BASE-T and 1000BASE-KX links. Furthermore, we show
that the random jitter of a synchronous clock over a 1000BASE-T link for a PTP
application is below 60 ps.
