  Building upon existing signal processing techniques and open-source software,
this paper presents a baseline design for an RF System-on-Chip Frequency
Division Multiplexed readout for a spatio-spectral focal plane instrument based
on low temperature detectors. A trade-off analysis of different FPGA carrier
boards is presented in an attempt to find an optimum next-generation solution
for reading out larger arrays of Microwave Kinetic Inductance Detectors
(MKIDs). The ZCU111 RF SoC FPGA board from Xilinx was selected, and it is shown
how this integrated system promises to increase the number of pixels that can
be read out (per board) which enables a reduction in the readout cost per
pixel, the mass and volume, and power consumption, all of which are important
in making MKID instruments more feasible for both ground-based and space-based
astrophysics. The on-chip logic capacity is shown to form a primary constraint
on the number of MKIDs which can be read, channelised, and processed with this
new system. As such, novel signal processing techniques are analysed, including
Digitally Down Converted (DDC)-corrected sub-maximally decimated sampling, in
an effort to reduce logic requirements without compromising signal to noise
ratio. It is also shown how combining the ZCU111 board with a secondary FPGA
board will allow all 8 ADCs and 8 DACs to be utilised, providing enough
bandwidth to read up to 8,000 MKIDs per board-set, an eight-fold improvement
over the state-of-the-art, and important in pursuing 100,000 pixel arrays.
Finally, the feasibility of extending the operational frequency range of MKIDs
to the 5 - 10 GHz regime (or possibly beyond) is investigated, and some
benefits and consequences of doing so are presented.
