  In this paper, we present Ara, a 64-bit vector processor based on the version
0.5 draft of RISC-V's vector extension, implemented in GlobalFoundries 22FDX
FD-SOI technology. Ara's microarchitecture is scalable, as it is composed of a
set of identical lanes, each containing part of the processor's vector register
file and functional units. It achieves up to 97% FPU utilization when running a
256 x 256 double precision matrix multiplication on sixteen lanes. Ara runs at
more than 1 GHz in the typical corner (TT/0.80V/25 oC) achieving a performance
up to 33 DP-GFLOPS. In terms of energy efficiency, Ara achieves up to 41
DP-GFLOPS/W under the same conditions, which is slightly superior to similar
vector processors found in literature. An analysis on several vectorizable
linear algebra computation kernels for a range of different matrix and vector
sizes gives insight into performance limitations and bottlenecks for vector
processors and outlines directions to maintain high energy efficiency even for
small matrix sizes where the vector architecture achieves suboptimal
utilization of the available FPUs.
