  Reactive synthesis supports designers by automatically constructing correct
hardware from declarative specifications. Synthesis algorithms usually compute
a strategy, and then construct a circuit that implements it. In this work, we
study SAT- and QBF-based methods for the second step, i.e., computing circuits
from strategies. This includes methods based on QBF-certification,
interpolation, and computational learning. We present optimizations, efficient
implementations, and experimental results for synthesis from safety
specifications, where we outperform BDDs both regarding execution time and
circuit size. This is an extended version of [2], with an additional appendix.
