  This paper explores the potential of communicating information gained by
static analysis from compilers to Out-of-Order (OoO) machines, focusing on the
memory dependence predictor (MDP). The MDP enables loads to issue without all
in-flight store addresses being known, with minimal memory order violations. We
use LLVM to find loads with no dependencies and label them via their opcode.
These labelled loads skip making lookups into the MDP, improving prediction
accuracy by reducing false dependencies. We communicate this information in a
minimally intrusive way, i.e.~without introducing additional hardware costs or
instruction bandwidth, providing these improvements without any additional
overhead in the CPU. We find that in select cases in Spec2017, a significant
number of load instructions can skip interacting with the MDP and lead to a
performance gain. These results point to greater possibilities for static
analysis as a source of near zero cost performance gains in future CPU designs.
