  In-memory computing (IMC) utilizing synaptic crossbar arrays is promising for
deep neural networks to attain high energy efficiency and integration density.
Towards that end, various CMOS and post-CMOS technologies have been explored as
promising synaptic device candidates which include SRAM, ReRAM, FeFET,
SOT-MRAM, etc. However, each of these technologies has its own pros and cons,
which need to be comparatively evaluated in the context of synaptic array
designs. For a fair comparison, such an analysis must carefully optimize each
technology, specifically for synaptic crossbar design accounting for device and
circuit non-idealities in crossbar arrays such as variations, wire resistance,
driver/sink resistance, etc. In this work, we perform a comprehensive design
space exploration and comparative evaluation of different technologies at 7nm
technology node for synaptic crossbar arrays, in the context of IMC robustness
and system accuracy. Firstly, we integrate different technologies into a
cross-layer simulation flow based on physics-based models of synaptic devices
and interconnects. Secondly, we optimize both technology-agnostic design knobs
such as input encoding and ON-resistance as well as technology-specific design
parameters including ferroelectric thickness in FeFET and MgO thickness in
SOT-MRAM. Our optimization methodology accounts for the implications of device-
and circuit-level non-idealities on the system-level accuracy for each
technology. Finally, based on the optimized designs, we obtain inference
results for ResNet-20 on CIFAR-10 dataset and show that FeFET-based crossbar
arrays achieve the highest accuracy due to their compactness, low leakage and
high ON/OFF current ratio.
