  A near-infrared (NIR) enhanced silicon single-photon avalanche diode (SPAD)
fabricated in a customized 0.13 $\mu$m CMOS technology is presented. The SPAD
has a depleted absorption volume of approximately 15 $\mu$m x 15 $\mu$m x 18
$\mu$m. Electrons generated in the absorption region are efficiently
transported by drift to a central active avalanche region with a diameter of 2
$\mu$m. At the operating voltage, the active region contains a spherically
uniform field peak, enabling the multiplication of electrons originating from
all corners of the device. The advantages of the SPAD architecture include high
NIR photon detection efficiency (PDE), drift-based transport, low afterpulsing,
and compatibility with an integrated CMOS readout. A front-side illuminated
device is fabricated and characterized. The SPAD has a PDE of 13% at wavelength
905 nm, an afterpulsing probability < 0.1% for a dead time of 13 ns, and a
median dark count rate (DCR) of 840 Hz at room temperature. The device shows
promising performance for time-of-flight applications that benefit from uniform
NIR-sensitive SPAD arrays.
