  3D stacked technology has emerged as an effective mechanism to overcome
physical limits and communication delays found in 2D integration. However, 3D
technology also presents several drawbacks that prevent its smooth application.
Two of the major concerns are heat reduction and power density distribution. In
our work, we propose a novel 3D thermal-aware floorplanner that includes: (1)
an effective thermal-aware process with 3 different evolutionary algorithms
that aim to solve the soft computing problem of optimizing the placement of
functional units and through silicon vias, as well as the smooth inclusion of
active cooling systems and new design strategies,(2) an approximated thermal
model inside the optimization loop, (3) an optimizer for active cooling (liquid
channels), and (4) a novel technique based on air channel placement designed to
isolate thermal domains have been also proposed. The experimental work is
conducted for a realistic many-core single-chip architecture based on the
Niagara design. Results show promising improvements of the thermal and
reliability metrics, and also show optimal scaling capabilities to target
future-trend many-core systems.
