  Approximate circuit design has gained significance in recent years targeting
error tolerant applications. In this paper, we first demonstrate that the
commonly used assumption that the inputs to the adder are uniformly distributed
results in an inaccurate prediction of error statistics for multi-level
circuits. To overcome this problem, we derive parameterized error models that
can be used within any optimization framework in order to optimize the number
of approximate bits. We also show that in order to accurately compute the mean
square error, the optimization framework needs to take into account not just
the functionality of the adder, but also its position in the circuit,
functionality of its parents and the number of approximate bits in the parent
blocks. We demonstrate a significant improvement of accuracy in the prediction
of the noise power of DSP systems containing approximate adders.
