  Linear models are regularly used for mapping cores to tiles in a chip.
System-on-Chip (SoC) design requires integration of functional units with
varying sizes, but conventional models only account for identical-sized cores.
Linear models cannot calculate the varying areas of cores in SoCs directly and
must rely on approximations. We propose using non-linear models: Semi-definite
programming (SDP) allows easy model definitions and achieves approximately 20%
reduced area and up to 80% reduced white space. As computational time is
similar to linear models, they can be applied, practically.
