  Need for the efficient processing of neural networks has given rise to the
development of hardware accelerators. The increased adoption of specialized
hardware has highlighted the need for more agile design flows for
hardware-software co-design and domain-specific optimizations. In this paper,
we present CFU Playground: a full-stack open-source framework that enables
rapid and iterative design and evaluation of machine learning (ML) accelerators
for embedded ML systems. Our tool provides a completely open-source end-to-end
flow for hardware-software co-design on FPGAs and future systems research. This
full-stack framework gives the users access to explore experimental and bespoke
architectures that are customized and co-optimized for embedded ML. Our rapid,
deploy-profile-optimization feedback loop lets ML hardware and software
developers achieve significant returns out of a relatively small investment in
customization. Using CFU Playground's design and evaluation loop, we show
substantial speedups between 55$\times$ and 75$\times$. The soft CPU coupled
with the accelerator opens up a new, rich design space between the two
components that we explore in an automated fashion using Vizier, an open-source
black-box optimization service.
