  Spiking Neural Networks (SNNs) can unleash the full power of analog Resistive
Random Access Memories (RRAMs) based circuits for low power signal processing.
Their inherent computational sparsity naturally results in energy efficiency
benefits. The main challenge implementing robust SNNs is the intrinsic
variability (heterogeneity) of both analog CMOS circuits and RRAM technology.
In this work, we assessed the performance and variability of RRAM-based
neuromorphic circuits that were designed and fabricated using a 130\,nm
technology node. Based on these results, we propose a Neuromorphic Hardware
Calibrated (NHC) SNN, where the learning circuits are calibrated on the
measured data. We show that by taking into account the measured heterogeneity
characteristics in the off-chip learning phase, the NHC SNN self-corrects its
hardware non-idealities and learns to solve benchmark tasks with high accuracy.
This work demonstrates how to cope with the heterogeneity of neurons and
synapses for increasing classification accuracy in temporal tasks.
