  CMOS imagers are becoming increasingly popular in astronomy. A very low noise
level is required to observe extremely faint targets and to get high-precision
flux measurements. Although CMOS technology offers many advantages over CCDs, a
major bottleneck is still the read noise. To move from an industrial CMOS
sensor to one suitable for scientific applications, an improved design that
optimizes the noise level is essential. Here, we study the 1/f and thermal
noise performance of the source follower (SF) of a CMOS pixel in detail. We
identify the relevant design parameters, and analytically study their impact on
the noise level using the BSIM3v3 noise model with an enhanced model of gate
capacitance. Our detailed analysis shows that the dependence of the 1/f noise
on the geometrical size of the source follower is not limited to minimum
channel length, compared to the classical approach to achieve the minimum 1/f
noise. We derive the optimal gate dimensions (the width and the length) of the
source follower that minimize the 1/f noise, and validate our results using
numerical simulations. By considering the thermal noise or white noise along
with 1/f noise, the total input noise of the source follower depends on the
capacitor ratio CG/CFD and the drain current (Id). Here, CG is the total gate
capacitance of the source follower and CFD is the total floating diffusion
capacitor at the input of the source follower. We demonstrate that the optimum
gate capacitance (CG) depends on the chosen bias current but ranges from CFD/3
to CFD to achieve the minimum total noise of the source follower. Numerical
calculation and circuit simulation with 180nm CMOS technology are performed to
validate our results.
