  Key parameters of analog-to-digital converters (ADCs) are their sampling rate
and dynamic range. Power consumption and cost of an ADC are directly
proportional to the sampling rate; hence, it is desirable to keep it as low as
possible. The dynamic range of an ADC also plays an important role, and
ideally, it should be greater than the signal's; otherwise, the signal will be
clipped. To avoid clipping, modulo folding can be used before sampling,
followed by an unfolding algorithm to recover the true signal. In this paper,
we present a modulo hardware prototype that can be used before sampling to
avoid clipping. Our modulo hardware operates prior to the sampling mechanism
and can fold higher frequency signals compared to existing hardware. We present
a detailed design of the hardware and also address key issues that arise during
implementation. In terms of applications, we show the reconstruction of
finite-rate-of-innovation signals which are beyond the dynamic range of the
ADC. Our system operates at six times below the Nyquist rate of the signal and
can accommodate eight-times larger signals than the ADC's dynamic range.
