  We review threats and selected schemes concerning hardware security at design
and manufacturing time as well as at runtime. We find that 3D integration can
serve well to enhance the resilience of different hardware security schemes,
but it also requires thoughtful use of the options provided by the umbrella
term of 3D integration. Toward enforcing security at runtime, we envision
secure 2.5D system-level integration of untrusted chips and "all around"
shielding for 3D ICs.
