  In this paper, we present GATSPI, a novel GPU accelerated logic gate
simulator that enables ultra-fast power estimation for industry sized ASIC
designs with millions of gates. GATSPI is written in PyTorch with custom CUDA
kernels for ease of coding and maintainability. It achieves simulation kernel
speedup of up to 1668X on a single-GPU system and up to 7412X on a multiple-GPU
system when compared to a commercial gate-level simulator running on a single
CPU core. GATSPI supports a range of simple to complex cell types from an
industry standard cell library and SDF conditional delay statements without
requiring prior calibration runs and produces industry-standard SAIF files from
delay-aware gate-level simulation. Finally, we deploy GATSPI in a
glitch-optimization flow, achieving a 1.4% power saving with a 449X speedup in
turnaround time compared to a similar flow using a commercial simulator.
