  In this work, we report a novel design, one-transistor-one-inverter (1T1I),
to satisfy high speed and low power on-chip training requirements. By
leveraging doped HfO2 with ferroelectricity, a non-volatile inverter is
successfully demonstrated, enabling desired continuous weight transition
between negative and positive via the programmable threshold voltage (VTH) of
ferroelectric field-effect transistors (FeFETs). Compared with commonly used
designs with the similar function, 1T1I uniquely achieves pure on-chip-based
weight transition at an optimized working current without relying on assistance
from off-chip calculation units for signed-weight comparison, facilitating
high-speed training at low power consumption. Further improvements in linearity
and training speed can be obtained via a two-transistor-one-inverter (2T1I)
design. Overall, focusing on energy and time efficiencies, this work provides a
valuable design strategy for future FeFET-based computing-in-memory (CiM).
