  Hardware data prefetcher engines have been extensively used to reduce the
impact of memory latency. However, microprocessors' hardware prefetcher engines
do not include any automatic hardware control able to dynamically tune their
operation. This lacking architectural feature causes systems to operate with
prefetchers in a fixed configuration, which in many cases harms performance and
energy consumption.
  In this paper, a piece of software that solves the discussed problem in the
context of the IBM POWER7 microprocessor is presented. The proposed solution
involves using the runtime software as a bridge that is able to characterize
user applications' workload and dynamically reconfigure the prefetcher engine.
The proposed mechanisms has been deployed over OmpSs, a state-of-the-art
task-based programming model. The paper shows significant performance
improvements over a representative set of microbenchmarks and High Performance
Computing (HPC) applications.
