  A theoretical memory with limited processing power and internal connectivity
at each element is proposed. This memory carries out parallel processing within
itself to solve generic array problems. The applicability of this in-memory
finest-grain massive SIMD approach is studied in some details. For an array of
N items, it reduces the total instruction cycle count of universal operations
such as insertion/deletion and match finding to ~ 1, local operations such as
filtering and template matching to ~ local operation size, and global
operations such as sum, finding global limit and sorting to ~\sqroot{N}
instruction cycles. It eliminates most streaming activities for data processing
purpose on the system bus. Yet it remains general-purposed, easy to use, pin
compatible with conventional memory, and practical for implementation.
