  Future digital signal processing (DSP) systems must provide robustness on
algorithm and application level to the presence of reliability issues that come
along with corresponding implementations in modern semiconductor process
technologies. In this paper, we address this issue by investigating the impact
of unreliable memories on general DSP systems. In particular, we propose a
novel framework to characterize the effects of unreliable memories, which
enables us to devise novel methods to mitigate the associated performance loss.
We propose to deploy specifically designed data representations, which have the
capability of substantially improving the system reliability compared to that
realized by conventional data representations used in digital integrated
circuits, such as 2s complement or sign-magnitude number formats. To
demonstrate the efficacy of the proposed framework, we analyze the impact of
unreliable memories on coded communication systems, and we show that the
deployment of optimized data representations substantially improves the
error-rate performance of such systems.
