  This document describes a family of quantum circuits which load classical
data into a quantum state. When loading $N$ classical bits, the result quantum
state is of order $\log_2(N)$ qubits. Furthermore the gate depth of the data
loading circuit is of order $\log_2(N)$. Limitations to the efficiency of the
data loading process such as the Holevo bound are discussed. Methods to improve
the efficiency of the data loading procedure such as combining classical
compression techniques with quantum decompression circuitry, are also
discussed. Simulations using the Quipper language were conducted to verify the
circuits behavior.
