  Increasing the efficiency and reducing the footprint of on-chip
photodetectors enables dense optical interconnects for emerging computational
and sensing applications. Avalanche photodetectors (APD) are currently the
dominating on-chip photodetectors. However, the physics of avalanche
multiplication leads to low energy efficiencies and prevents device operation
at a high gain, due to a high excess noise, resulting in the need for
electrical amplifiers. These properties significantly increase power
consumption and footprint of current optical receivers. In contrast,
heterojunction phototransistors (HPT) exhibit high efficiency and very small
excess noise at high gain. However, HPT's gain-bandwidth product (GBP) is
currently inferior to that of APDs at low optical powers. Here, we demonstrate
that the type-II energy band alignment in an antimony-based HPT results in a
significantly smaller junction capacitance and higher GBP at low optical
powers. We used a CMOS-compatible heterogeneous integration method to create
compact optical receivers on silicon with an energy efficiency that is about
one order of magnitude higher than that of the best reported integrated APDs on
silicon at a similar GBP of 270 GHz. Bitrate measurements show data rate
spatial density above 800 Tbps per mm2, and an energy-per-bit consumption of
only 6 fJ/bit at 3 Gbps. These unique features suggest new opportunities for
creating highly efficient and compact on-chip optical receivers based on
devices with type-II band alignment.
