  Topological quantum computing has recently proven itself to be a very
powerful model when considering large- scale, fully error corrected quantum
architectures. In addition to its robust nature under hardware errors, it is a
software driven method of error corrected computation, with the hardware
responsible for only creating a generic quantum resource (the topological
lattice). Computation in this scheme is achieved by the geometric manipulation
of holes (defects) within the lattice. Interactions between logical qubits
(quantum gate operations) are implemented by using particular arrangements of
the defects, such as braids and junctions. We demonstrate that junction-based
topological quantum gates allow highly regular and structured implementation of
large CNOT (controlled-not) gate networks, which ultimately form the basis of
the error corrected primitives that must be used for an error corrected
algorithm. We present a number of heuristics to optimise the area of the
resulting structures and therefore the number of the required hardware
resources.
