  Numerous applications such as graph processing, cryptography, databases,
bioinformatics, etc., involve the repeated evaluation of Boolean functions on
large bit vectors. In-memory architectures which perform processing in memory
(PIM) are tailored for such applications. This paper describes a different
architecture for in-memory computation called CIDAN, that achieves a 3X
improvement in performance and a 2X improvement in energy for a representative
set of algorithms over the state-of-the-art in-memory architectures. CIDAN uses
a new basic processing element called a TLPE, which comprises a threshold logic
gate (TLG) (a.k.a artificial neuron or perceptron). The implementation of a TLG
within a TLPE is equivalent to a multi-input, edge-triggered flipflop that
computes a subset of threshold functions of its inputs. The specific threshold
function is selected on each cycle by enabling/disabling a subset of the
weights associated with the threshold function, by using logic signals. In
addition to the TLG, a TLPE realizes some non-threshold functions by a sequence
of TLG evaluations. An equivalent CMOS implementation of a TLPE requires a
substantially higher area and power. CIDAN has an array of TLPE(s) that is
integrated with a DRAM, to allow fast evaluation of any one of its set of
functions on large bit vectors. Results of running several common in-memory
applications in graph processing and cryptography are presented.
