  Processing-in-memory (PIM) architectures allow software to explicitly
initiate computation in the memory. This effectively makes PIM operations a new
class of memory operations, alongside standard memory operations (e.g., load,
store). For software correctness, it is crucial to have ordering rules for a
PIM operation with other PIM operations and other memory operations, i.e., a
consistency model that takes into account PIM operations is vital. To the best
of our knowledge, little attention to PIM operation consistency has been given
in existing works. In this paper, we focus on a specific PIM approach, named
bulk-bitwise PIM. In bulk-bitwise PIM, large bitwise operations are performed
directly and stored in the memory array. We show that previous solutions for
the related topic of maintaining coherency of bulk-bitwise PIM have broken the
host native consistency model and prevent any guaranteed correctness. As a
solution, we propose and evaluate four consistency models for bulk-bitwise PIM,
from strict to relaxed. Our designs also preserve coherency between PIM and the
host processor. Evaluating the proposed designs' performance with a gem5
simulation, using the YCSB short-range scan benchmark and TPC-H queries, shows
that the run time overhead of guaranteeing correctness is at most $6\%$, and in
many cases the run time is even improved. The hardware overhead of our design
is less than $0.22\%$.
