  Atomic precision advanced manufacturing (APAM) offers creation of donor
devices in an atomically thin layer doped beyond the solid solubility limit,
enabling unique device physics. This presents an opportunity to use APAM as a
pathfinding platform to investigate digital electronics at the atomic limit.
Scaling to smaller transistors is increasingly difficult and expensive,
necessitating the investigation of alternative fabrication paths that extend to
the atomic scale. APAM donor devices can be created using a scanning tunneling
microscope (STM). However, these devices are not currently compatible with
industry standard fabrication processes. There exists a tradeoff between low
thermal budget (LT) processes to limit dopant diffusion and high thermal budget
(HT) processes to grow defect-free layers of epitaxial Si and gate oxide. To
this end, we have developed an LT epitaxial Si cap and LT deposited Al2O3 gate
oxide integrated with an atomically precise single-electron transistor (SET)
that we use as an electrometer to characterize the quality of the gate stack.
The surface-gated SET exhibits the expected Coulomb blockade behavior. However,
the leverage of the gate over the SET is limited by defects in the layers above
the SET, including interfaces between the Si and oxide, and structural and
chemical defects in the Si cap. We propose a more sophisticated gate stack and
process flow that is predicted to improve performance in future atomic
precision devices.
