  Correctness and robustness are essential for logic synthesis applications,
but they are often only tested with a limited set of benchmarks. Moreover, when
the application fails on a large benchmark, the debugging process may be
tedious and time-consuming. In some fields such as compiler construction,
automatic testing and debugging tools are well-developed to support developers
and provide minimal guarantees on program quality. In this paper, we adapt fuzz
testing and delta debugging techniques and specialize them for gate-level
netlists commonly used in logic synthesis. Our toolkit improves over similar
tools specialized for the AIGER format by supporting other gate-level netlist
formats and by allowing a tight integration to provide 10x speed-up.
Experimental results show that our fuzzer captures defects in mockturtle, ABC,
and LSOracle with 10x smaller testcases and our testcase minimizer extracts
minimal failure-inducing cores using 2x fewer oracle calls.
