  The effects of reactive loads into amplification is studied. A simplified
common emitter circuit configuration was adopted and respective
time-independent and time-dependent voltage and current equations were
obtained. As phasor analysis cannot be used because of the non-linearity, the
voltage at the capacitor was represented in terms of the respective integral,
implying a numerical approach. The effect of purely resistive loads was
investigated first, and it was shown that the fanned structure of the
transistor isolines can severely distort the amplification, especially for
$V_a$ small and $s$ large. The total harmonic distortion was found not to
depend on $V_a$, being determined by $s$ and the load resistance $R$. An
expression was obtained for the current gain in terms of the base current and
it was shown that it decreases in an almost perfectly linearly fashion with
$I_B$. Remarkably, no gain variation, and hence perfectly linear amplification,
is obtained when $R=0$, provided maximum power dissipation limits are not
exceeded. Capacitive loads imply the detachment of the circuit trajectory from
a straight line to an "ellipsoidal"-like loop. This implies a gain asymmetry
along upper or lower arcs of this loop. By using the time-dependent circuit
equations, it was possible to show numerically and by an analytical
approximation that, at least for the adopted circuit and parameter values, the
asymmetry induced by capacitive loads is not substantial. However, capacitive
loads will imply lag between the output voltage and current and, hence,
low-pass filtering. It was shown that smaller $V_a$ and larger $s$ can
substantially reduce the phase lag, but at the cost of severe distortion.
