  Putting a watermark into digital circuitry has its own set of challenges.
Creating a secure watermark in printed matter usually involves including
graphics that are difficult to reproduce. In circuitry, including additional
circuitry that is hard to produce, one must contend with the prospect of
increasing power consumption of the circuit, decreasing the speed of the
circuit, and introducing watermark circuitry that is easily reproduced. In this
paper we present a watermark method for sequential circuitry. It allows for
several degrees of calibration, allowing the user to tune the complexity of the
watermark to requirements of speed, power, and efficacy. Our method uses an
encryption technique to introduce secrets about the watermark circuit, at
several levels. It also employs a boundary scan testing protocol as a means to
protect the watermark circuitry. Our discussion starts by describing the
different tools needed in our watermark scheme. We then discuss the difficulty
of the problem associated with cracking our watermark circuit. This analysis
shows that, with full implementation, our method can be made quite secure.
