  Negative capacitance field-effect transistors (NC-FETs) have attracted wide
interest as promising candidates for steep-slope devices, and sub-60 mV/decade
switching has been demonstrated in NC-FETs with various device structures and
material systems. However, the detailed mechanisms of the observed steep-slope
switching in some of these experiments are under intense debate. Here we show
that sub-60 mV/decade switching can be observed in a WS2 transistor with a
metal-insulator-metal-insulator-semiconductor (MIMIS) structure - without any
ferroelectric component. This structure resembles an NC-FET with internal gate,
except that the ferroelectric layer is replaced by a leaky dielectric layer.
Through simulations of the charging dynamics during the device characterization
using an RC network model, we show that the observed steep-slope switching in
our "ferroelectric-free" transistors can be attributed to the internal gate
voltage response to the chosen varying gate voltage scan rates. We further show
that a constant gate voltage scan rate can also lead to transient sub-60
mV/decade switching in an MIMIS structure with voltage dependent internal gate
capacitance. Our results indicate that the observation of sub-60 mV/decade
switching alone is not sufficient evidence for the successful demonstration of
a true steep-slope switching device and that experimentalists need to
critically assess their measurement setups to avoid measurement-related
artefacts.
