  Smaller feature size, higher clock frequency and lower power consumption are
of core concerns of today's nano-technology, which has been resulted by
continuous downscaling of CMOS technologies. The resultant 'device shrinking'
reduces the soft error tolerance of the VLSI circuits, as very little energy is
needed to change their states. Safety critical systems are very sensitive to
soft errors. A bit flip due to soft error can change the value of critical
variable and consequently the system control flow can completely be changed
which leads to system failure. To minimize soft error risks, a novel
methodology is proposed to detect and recover from soft errors considering only
'critical code blocks' and 'critical variables' rather than considering all
variables and/or blocks in the whole program. The proposed method shortens
space and time overhead in comparison to existing dominant approaches.
