  Phase change memory (PCM) is an emerging high speed, high density, high
endurance, and scalable non-volatile memory technology which utilizes the large
resistivity contrast between the amorphous and crystalline phases of
chalcogenide materials such as Ge2Sb2Te5 (GST). In addition to being used as a
standalone memory, there has been a growing interest in integration of PCM
devices on top of the CMOS layer for computation in memory and neuromorphic
computing. The large CMOS overhead for memory controllers is a limiting factor
for this purpose. Transferring functionality like routing, multiplexing, and
logic to the memory layer can substantially reduce the CMOS overhead, making it
possible to integrate 100s of GB of PCM storage on top of a conventional CPU.
In this work, we present computational analysis of a phase change device
concept that can perform toggle operations. The toggle functionality is
achieved using two physical mechanisms: (i) isolation of different read
contacts due to amorphization between different write contact pairs, and (ii)
thermal cross-talk between a molten region and a previously amorphized region.
Phase-change devices with six contacts can be implemented as toggle flip-flops,
multiplexer, or demultiplexer when interfaced with CMOS transistors. Here, we
demonstrate the operation of the device as a toggle flip-flop with 5
transistors, requiring ~50% of the footprint compared to conventional CMOS
alternatives, with the added advantage of non-volatility.
