  Our toolchain for accelerating application called Courier-FPGA, is designed
for utilize the processing power of CPU-FPGA platforms for software programmers
and non-expert users. It automatically gathers runtime information of library
functions from a running target binary, and constructs the function call graph
including input-output data. Then, it uses corresponding predefined hardware
modules if these are ready for FPGA and prepares software functions on CPU by
using Pipeline Generator. The Pipeline Generator builds a pipeline control
program by using Intel Threading Building Block to run both hardware modules
and software functions in parallel. Finally, Courier-FPGA dynamically replaces
the original functions in the binary and accelerates it by using the built
pipeline. Courier-FPGA performs these acceleration processes without user
intervention, source code tweaks or re-compilations of the binary. We describe
the technical details of this mixed software hardware pipeline on CPU-FPGA
platforms in this paper. In our case study, Courier-FPGA was used to accelerate
a corner detection using the Harris-Stephens method application binary on the
Zynq platform. A series of functions were off-loaded, and speed up 15.36 times
was achieved by using the built pipeline.
