  The Analog Pipeline Chip (APC) is a low noise, low power readout chip for
silicon micro strip detectors with 128 channels containing an analog pipeline
of 32 buffers depth. The chip has been designed for operation at HERA with a
power dissipation of 300-400 muW per channel and has been used also in several
other particle physics experiments. In this paper we describe the development
of a radiation hard version of this chip that will be used in the H1 vertex
detector for operation at the luminosity upgraded HERA machine. A 128 channel
prototyping chip with several amplifier variations has been designed in the
radiation hard DMILL technology and measured. The results of various parameter
variations are presented in this paper. Based on this, the design choice for
the final production version of the APC128-DMILL has been made.
