  The Xilinx ZCU111 Radio Frequency System on Chip (RFSoC) is a promising
solution for reading out large arrays of microwave kinetic inductance detectors
(MKIDs). The board boasts eight on-chip 12-bit / 4.096 GSPS analogue-to-digital
converters (ADCs) and eight 14-bit / 6.554 GSPS digital-to-analogue converters
(DACs), as well as field programmable gate array (FPGA) resources of 930,000
logic cells and 4,272 digital signal processing (DSP) slices. While this is
sufficient data converter bandwidth for the readout of 8,000 MKIDs, with a 2
MHz channel-spacing, and a 1 MHz sampling rate (per channel), additional FPGA
resources are needed to perform the DSP needed to process this large number of
MKIDs. A solution to this problem is the new Xilinx RFSoC 2x2 board. This board
costs only one fifth of the ZCU111 while still providing the same logic
resources as the ZCU111, albeit with only a quarter of the data converter
resources. Thus, using multiple RFSoC 2x2 boards would provide a better balance
between FPGA resources and data converters, allowing the full utilization of
the RF bandwidth provided by the data converters, while also lowering the cost
per pixel value of the readout system, from approximately EUR2.50 per pixel
with the ZCU111, to EUR1 per pixel.
