  Small animal Positron Emission Tomography (PET) is dedicated to small animal
imaging, which requires high position and energy precision, as well as good
flexibility and efficiency of the electronics. This paper presents the design
of a digital signal processing logic for a marmoset brain PET system based on
LYSO crystal arrays, SiPMs, and the resistive network readout method. We
implement 32-channel signal processing in a single Xilinx Artix-7
Field-Programmable Gate Array (FPGA). The logic is designed to support four
online modes which are regular data processing mode, flood map construction
mode, energy spectrum construction mode, and raw data mode. Several functions
are integrated, including two-dimensional (2D) raw position calculation,
crystal locating, events filtering, and synchronization detection. Furthermore,
a series of online corrections is also integrated, such as photon peak
correction to 511 keV and time measurement result correction with crystal
granularity. A Gigabit Ethernet interface is utilized for data transfer,
Look-Up Tables (LUTs) configuration, and command issuing. The pipeline logic
works at 125 MHz with a signal processing capability beyond the required data
rate of 1,000,000 events/s/channel. A series of initial tests are conducted.
The results indicate that the logic design meets the application requirement.
