  Field-programmable gate array (FPGA) based accelerators are being widely used
for acceleration of convolutional neural networks (CNNs) due to their potential
in improving the performance and reconfigurability for specific application
instances. To determine the optimal configuration of an FPGA-based accelerator,
it is necessary to explore the design space and an accurate performance
prediction plays an important role during the exploration. This work introduces
a novel method for fast and accurate estimation of latency based on a Gaussian
process parametrised by an analytic approximation and coupled with runtime
data. The experiments conducted on three different CNNs on an FPGA-based
accelerator on Intel Arria 10 GX 1150 demonstrated a 30.7% improvement in
accuracy with respect to the mean absolute error in comparison to a standard
analytic method in leave-one-out cross-validation.
