  We present the results of an R&D study for a specialized processor capable of
precisely reconstructing events with hundreds of charged-particle tracks in
pixel and silicon strip detectors at $40\,\rm MHz$, thus suitable for
processing LHC events at the full crossing frequency. For this purpose we
design and test a massively parallel pattern-recognition algorithm, inspired to
the current understanding of the mechanisms adopted by the primary visual
cortex of mammals in the early stages of visual-information processing. The
detailed geometry and charged-particle's activity of a large tracking detector
are simulated and used to assess the performance of the artificial retina
algorithm. We find that high-quality tracking in large detectors is possible
with sub-microsecond latencies when the algorithm is implemented in modern,
high-speed, high-bandwidth FPGA devices.
