  In the last decade, several works have focused on exploring the material and
electrical properties of $\text{GeTe/Sb}_{2}\text{Te}_{3}$ superlattices (SLs)
in particular because of some first device implementations demonstrating
interesting performances such as fast switching speed, low energy consumption,
and non-volatility. However, the switching mechanism in such SL-based devices
remains under debate. In this work, we investigate the prototype
$\text{GeTe/Sb}_{2}\text{Te}_{3}$ SLs, to analyze fundamentally their
electronic and thermal properties by ab initio methods. We find that the
resistive contrast is small among the different phases of
$\text{GeTe/Sb}_{2}\text{Te}_{3}$ because of a small electronic gap (about 0.1
eV) and a consequent semi-metallic-like behavior. At the same time the
out-of-plane lattice thermal conductivity is rather small, while varying up to
four times among the different phases, from 0.11 to 0.45 W/m$^{-1}$K$^{-1}$,
intimately related to the number of Van der Waals (VdW) gaps in a unit block.
Such findings confirm the importance of the thermal improvement achievable in
$\text{GeTe/Sb}_{2}\text{Te}_{3}$ super-lattices devices, highlighting the
impact of the material stacking and the role of VdW gaps on the thermal
engineering of the Phase-Change Memory cell.
