  Nominally undoped silicon nanowires (NW) were grown by catalytic chemical
vapor deposition. The growth process was optimized to control the NWs diameters
by using different Au catalyst thicknesses on amorphous SiO2, Si3N4, or
crystalline-Si substrates. For SiO2 substrates an Ar plasma treatment was used
to homogenize the catalyst coalescence, and thus the NWs diameter. Furthermore,
planar field effect transistors (FETs) were fabricated by implementing 10 to 30
nm thin nominally undoped Si-NWs as the active region. Various silicides were
investigated as Schottky-barrier source and drain contacts for the active
region. For CoSi, NiSi and PdSi contacts, the FETs transfer characteristics
showed p-type behavior. A FET consisting of a single Si-NW with 20 nanometers
diameter and 2.5 micrometer gate-length delivers as much as 0.15 microA
on-current at 1 volt bias voltage and has an on/off current ratio of 10^7. This
is in contrast to recent reports of low conductance in undoped Si.
