  We demonstrate a 36$\times$36 gate electrode crossbar that supports 648
narrow-channel field effect transistors (FET) for gate-defined quantum dots,
with a quadratic increase in quantum dot count upon a linear increase in
control lines. The crossbar is fabricated on an industrial $^{28}$Si-MOS stack
and shows 100% FET yield at cryogenic temperature. We observe a decreasing
threshold voltage for wider channel devices and obtain a normal distribution of
pinch-off voltages for nominally identical tunnel barriers probed over 1296
gate crossings. Macroscopically across the crossbar, we measure an average
pinch-off of 1.17~V with a standard deviation of 46.8 mV, while local
differences within each unit cell indicate a standard deviation of 23.1~mV.
These disorder potential landscape variations translate to 1.2 and 0.6 times
the measured quantum dot charging energy, respectively. Such metrics provide
means for material and device optimization and serve as guidelines in the
design of large-scale architectures for fault-tolerant semiconductor-based
quantum computing.
