  Quantum random number generators (QRNG) based on continuous variable (CV)
quantum fluctuations offer great potential for their advantages in measurement
bandwidth, stability and integrability. More importantly, it provides an
efficient and extensible path for significant promotion of QRNG generation
rate. During this process, real-time randomness extraction using information
theoretically secure randomness extractors is vital, because it plays critical
role in the limit of throughput rate and implementation cost of QRNGs. In this
work, we investigate parallel and real-time realization of several
Toeplitz-hashing extractors within one field-programmable gate array (FPGA) for
parallel QRNG. Elaborate layout of Toeplitz matrixes and efficient utilization
of hardware computing resource in the FPGA are emphatically studied. Logic
source occupation for different scale and quantity of Toeplitz matrices is
analyzed and two-layer parallel pipeline algorithm is delicately designed to
fully exploit the parallel algorithm advantage and hardware source of the FPGA.
This work finally achieves a real-time post-processing rate of QRNG above 8
Gbps. Matching up with integrated circuit for parallel extraction of multiple
quantum sideband modes of vacuum state, our demonstration shows an important
step towards chip-based parallel QRNG, which could effectively improve the
practicality of CV QRNGs, including device trusted, device-independent, and
semi-device-independent schemes.
