  In this paper, we present microring resonator (MRR) based polymorphic E-O
circuits and architectures that can be employed for high-speed and
energy-efficient non-binary reconfigurable computing. Our polymorphic E-O
circuits can be dynamically programmed to implement different logic and
arithmetic functions at different times. They can provide compactness and
polymorphism to consequently improve operand handling, reduce idle time, and
increase amortization of area and static power overheads. When combined with
flexible photodetectors with the innate ability to accumulate a high number of
optical pulses in situ, our circuits can support energy-efficient processing of
data in non-binary formats such as stochastic/unary and high-dimensional
reservoir formats. Furthermore, our polymorphic E-O circuits enable
configurable E-O computing accelerator architectures for processing binarized
and integer quantized convolutional neural networks (CNNs). We compare our
designed polymorphic E-O circuits and architectures to several circuits and
architectures from prior works in terms of area, latency, and energy
consumption.
