  Due to the limitations of realizing artificial neural networks on prevalent
von Neumann architectures, recent studies have presented neuromorphic systems
based on spiking neural networks (SNNs) to reduce power and computational cost.
However, conventional analog voltage-domain integrate-and-fire (I&F) neuron
circuits, based on either current mirrors or op-amps, pose serious issues such
as nonlinearity or high power consumption, thereby degrading either inference
accuracy or energy efficiency of the SNN. To achieve excellent energy
efficiency and high accuracy simultaneously, this paper presents a low-power
highly linear time-domain I&F neuron circuit. Designed and simulated in a 28nm
CMOS process, the proposed neuron leads to more than 4.3x lower error rate on
the MNIST inference over the conventional current-mirror-based neurons. In
addition, the power consumed by the proposed neuron circuit is simulated to be
0.230uW per neuron, which is orders of magnitude lower than the existing
voltage-domain neurons.
