  Very few of the innovations in deep networking have seen data center scale
implementation. Because the Data Center network's extreme scale performance
requires hardware implementation, which is only accessible to a few. However,
the emergence of reconfigurable match-action table (RMT) paradigm-based
switches have finally opened up the development life cycle of data plane
devices. The P4 language is the dominant language choice for programming these
devices. Now, Network operators can implement the desired feature over white
box RMT switches. The process involves an innovator writing new algorithms in
the P4 language and getting them compiled for the target hardware. However,
there is still a roadblock. After designing an algorithm, the P4 program's
compilation technology is not fully open-source. Thus, it is very difficult for
an average researcher to get deep insight into the performance of his/her
innovation when executed at the silicon level. There is no open-source compiler
backend available for this purpose. Proprietary compiler backends provided by
different hardware vendors are available for this purpose. However, they are
closed-source and do not provide access to the internal mapping mechanisms.
Which inhibits experimenting with new mapping algorithms and innovative
instruction sets for reconfigurable match-action table architecture. This paper
describes our work toward an open-source compiler backend for compiling P416
targeted for the V1Model architecture-based programmable switches.
