  Three-dimensional generative adversarial networks (3D-GAN) have attracted
widespread attention in three-dimension (3D) visual tasks. 3D deconvolution
(DeConv), as an important computation of 3D-GAN, significantly increases
computational complexity compared with 2D DeConv. 3D DeConv has become a
bottleneck for the acceleration of 3D-GAN. Previous accelerators suffer from
several problems, such as large memory requirements and resource
underutilization. To handle the above issues, a fast algorithm for 3D DeConv
(F3DC) is proposed in this paper. F3DC applies a fast algorithm to reduce the
number of multiplications and achieves a significant algorithmic strength
reduction. Besides, F3DC removes the extra memory requirement for overlapped
partial sums and avoids computational imbalance to fully utilize resources.
Moreover, we design an F3DC-based hardware architecture, which consists of four
fast processing units (FPUs). Each FPU includes a pre-process module, a EWMM
module and a post-process module for F3DC transformation. By implementing our
design on the Xilinx VC709 platform for 3D-GAN, we achieve a throughput up to
1700 GOPS and 4$\times$ computational efficiency improvement compared with
prior works.
