  It is well understood that a two-dimensional grid of locally-interacting
qubits is a promising platform for achieving fault tolerant quantum computing.
However in the near-future, it may prove less challenging to develop lower
dimensional structures. In this paper, we show that such constrained
architectures can also support fault tolerance; specifically we explore a
2$\times$N array of qubits where the interactions between non-neighbouring
qubits are enabled by shuttling the logical information along the rows of the
array. Despite the apparent constraints of this setup, we demonstrate that
error correction is possible and identify the classes of codes that are
naturally suited to this platform. Focusing on silicon spin qubits as a
practical example of qubits believed to meet our requirements, we provide a
protocol for achieving full universal quantum computation with the surface
code, while also addressing the additional constraints that are specific to a
silicon spin qubit device. Through numerical simulations, we evaluate the
performance of this architecture using a realistic noise model, demonstrating
that both surface code and more complex qLDPC codes efficiently suppress gate
and shuttling noise to a level that allows for the execution of quantum
algorithms within the classically intractable regime. This work thus brings us
one step closer to the execution of quantum algorithms that outperform
classical machines.
