  A foundational assumption of quantum error correction theory is that quantum
gates can be scaled to large processors without exceeding the error-threshold
for fault tolerance. Two major challenges that could become fundamental
roadblocks are manufacturing high performance quantum hardware and engineering
a control system that can reach its performance limits. The control challenge
of scaling quantum gates from small to large processors without degrading
performance often maps to non-convex, high-constraint, and time-dependent
control optimization over an exponentially expanding configuration space. Here
we report on a control optimization strategy that can scalably overcome the
complexity of such problems. We demonstrate it by choreographing the frequency
trajectories of 68 frequency-tunable superconducting qubits to execute single-
and two-qubit gates while mitigating computational errors. When combined with a
comprehensive model of physical errors across our processor, the strategy
suppresses physical error rates by $\sim3.7\times$ compared with the case of no
optimization. Furthermore, it is projected to achieve a similar performance
advantage on a distance-23 surface code logical qubit with 1057 physical
qubits. Our control optimization strategy solves a generic scaling challenge in
a way that can be adapted to a variety of quantum operations, algorithms, and
computing architectures.
