  CRYSTAL-Kyber (Kyber) is one of the post-quantum cryptography (PQC)
key-encapsulation mechanism (KEM) schemes selected during the standardization
process. This paper addresses optimization for Kyber architecture with respect
to latency and throughput constraints. Specifically, matrix-vector
multiplication and number theoretic transform (NTT)-based polynomial
multiplication are critical operations and bottlenecks that require
optimization. To address this challenge, we propose an algorithm and hardware
co-design approach to systematically optimize matrix-vector multiplication and
NTT-based polynomial multiplication by employing a novel sub-structure sharing
technique in order to reduce computational complexity, i.e., the number of
modular multiplications and modular additions/subtractions consumed. The
sub-structure sharing approach is inspired by prior fast parallel approaches
based on polyphase decomposition. The proposed efficient feed-forward
architecture achieves high speed, low latency, and full utilization of all
hardware components, which can significantly enhance the overall efficiency of
the Kyber scheme. The FPGA implementation results show that our proposed
design, using the fast two-parallel structure, leads to an approximate
reduction of 90% in execution time, along with a 66 times improvement in
throughput performance.
