  The many cores design research community have shown high interest in optical
crossbars on chip for more than a decade. Key properties of optical crossbars,
namely a) contention free data routing b) low latency communication and c)
potential for high bandwidth through the use of WDM, motivate several
implementations of this type of interconnect. These implementations demonstrate
very different scalability and power efficiency ability depending on three key
design factors: a) the network topology, b) the considered layout and the c)
the injection losses induced by the fabrication process. In this paper, the
worst-case optical losses of crossbar implementations are compared according to
the factors mentioned above. The comparison results has the potential to help
many cores system designer to select the most appropriate crossbar
implementation according, for instance, to the number of IP cores and the chip
die size.
