  Quantum information processors need to be protected against errors and
faults. One of the most widely considered fault-tolerant architecture is based
on surface codes. While the general principles of these codes are well
understood and basic code properties such as minimum distance and rate are easy
to characterize, a code's average performance depends on the detailed geometric
layout of the qubits. To date, optimizing a surface code architecture and
comparing different geometric layouts relies on costly numerical simulations.
Here, we propose a benchmarking algorithm for simulating the performance of
surface codes, and generalizations thereof, that runs in linear time. We
implemented this algorithm in a software that generates performance reports and
allows to quickly compare different architectures.
