  On a chassis of gear model, we have offered a quantitative description for
our method to synthesize a chemical clock signal with various duty cycles in
Part I. As Part II of the study, this paper devotes itself in proposing a
design methodology to handle frequency alteration issues for the chemical
clock, including both frequency division and frequency multiplication. Several
interesting examples are provided for a better explanation of our contribution.
All the simulation results verify and validate the correctness and efficiency
of our proposal.
