  Graph partitioning, or community detection, is the cornerstone of many
fields, such as logistics, transportation and smart power grids. Efficient
computation and efficacious evaluation of communities are both essential,
especially in commercial and industrial settings. However, the solution space
of graph partitioning increases drastically with the number of vertices and
subgroups. With an eye to solving large scale graph partitioning and other
optimization problems within a short period of time, the Digital Annealer (DA),
a specialized CMOS hardware also featuring improved algorithms, has been
devised by Fujitsu Ltd. This study gauges Fujitsu DA's performance and running
times. The modularity was implemented as both the objective function and metric
for the solutions. The graph partitioning problems were formatted into
Quadratic Unconstrained Binary Optimization (QUBO) structures so that they
could be adequately imported into the DA. The DA yielded the highest modularity
among other studies when partitioning Karate Club, Les Miserables, American
Football, and Dolphin. Moreover, the DA was able to partition the Case
1354pegase power grid network into 45 subgroups, calling for 60,930 binary
variables, whilst delivering optimal modularity results within a solving time
of roughly 80 seconds. Our results suggest that the Fujitsu DA can be applied
for rapid and efficient optimization for graph partitioning.
