  In the present work PLL-based circuits with sinusoidal phase detector
characteristic and active proportionally-integrating (PI) filter are
considered. The notion of lock-in range -- an important characteristic of
PLL-based circuits, which corresponds to the synchronization without cycle
slipping, is studied. For the lock-in range a rigorous mathematical definition
is discussed. Numerical and analytical estimates for the lock-in range are
obtained.
