  Approximate computing is an attractive paradigm for reducing the design
complexity of error-resilient systems, therefore improving performance and
saving power consumption. In this work, we propose a new two-level approximate
logic synthesis method based on cube insertion and removal procedures.
Experimental results have shown significant literal count and runtime reduction
compared to the state-of-the-art approach. The method scalability is
illustrated for a high error threshold over large benchmark circuits. The
obtained solutions have presented a literal number reduction up to 38%, 56% and
93% with respect to an error rate of 1%, 3% and 5%, respectively.
