  Due to the small size of nanoscale devices, they are highly prone to process
disturbances which results in manufacturing defects. Some of the defects are
randomly distributed throughout the nanodevice layer. Other disturbances tend
to be local and lead to cluster defects caused by factors such as layer
misintegration and line width variations. In this paper, we propose a method
for identifying cluster defects from random ones. The motivation is to repair
the cluster defects using rectangular ranges in a range matching
content-addressable memory (RM-CAM) and random defects using triple-modular
redundancy (TMR). It is believed a combination of these two approaches is more
effective for repairing defects at high error rate with less resource. With the
proposed fault repairing technique, defect recovery results are examined for
different fault distribution scenarios. Also the mapping circuit structure
required for two conceptual 32*32 and 64*64 bit RAMs are presented and their
speed, power and transistor count are reported.
