  With the increased attention to memristive-based in-memory analog computing
(IMAC) architectures as an alternative for energy-hungry computer systems for
machine learning applications, a tool that enables exploring their device- and
circuit-level design space can significantly boost the research and development
in this area. Thus, in this paper, we develop IMAC-Sim, a circuit-level
simulator for the design space exploration of IMAC architectures. IMAC-Sim is a
Python-based simulation framework, which creates the SPICE netlist of the IMAC
circuit based on various device- and circuit-level hyperparameters selected by
the user, and automatically evaluates the accuracy, power consumption, and
latency of the developed circuit using a user-specified dataset. Moreover,
IMAC-Sim simulates the interconnect parasitic resistance and capacitance in the
IMAC architectures and is also equipped with horizontal and vertical
partitioning techniques to surmount these reliability challenges. IMAC-Sim is a
flexible tool that supports a broad range of device- and circuit-level
hyperparameters. In this paper, we perform controlled experiments to exhibit
some of the important capabilities of the IMAC-Sim, while the entirety of its
features is available for researchers via an open-source tool.
