  Simulating a shared register can mask the intricacies of designing algorithms
for asynchronous message-passing systems subject to crash failures, since it
allows them to run algorithms designed for the simpler shared-memory model.
Typically such simulations replicate the value of the register in multiple
servers and require readers and writers to communicate with a majority of
servers. The success of this approach for static systems, where the set of
nodes (readers, writers, and servers) is fixed, has motivated several similar
simulations for dynamic systems, where nodes may enter and leave. However,
existing simulations need to assume that the system eventually stops changing
for a long enough period or that the system size is bounded. This paper
presents the first simulation of an atomic read/write register in a crash-prone
asynchronous system that can change size and withstand nodes continually
entering and leaving. The simulation allows the system to keep changing,
provided that the number of nodes entering and leaving during a fixed time
interval is at most a constant fraction of the current system size. The
simulation also tolerates node crashes as long as the number of failed nodes in
the system is at most a constant fraction of the current system size.
