(Bloomberg) -- Taiwan Semiconductor Manufacturing Co. said production at a planned facility in Arizona will be postponed from late 2024 until 2025, an ominous delay as Washington tries to establish a more robust chip industry.
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Chairman Mark Liu said there are several challenges that TSMC faces at the US facility, including a shortage of skilled workers and expenses running higher than in Taiwan. The company is shifting some employees to Arizona to help with the development.
“We are working on improving this by sending skilled technical workers from Taiwan to the US,” Liu said on a conference call after earnings.
President Joe Biden’s administration has made development of domestic chip production a top strategic priority, backed by subsidies in the Chips Act that may top $50 billion. As the US clashes with China, American politicians have been concerned about the vulnerability of Taiwan, which Beijing has claimed as its own territory.
TSMC made the remarks as the company reported financial results for the second quarter and cut its outlook for revenue in 2023. The company, which makes chips for Apple Inc. and Nvidia Corp., projected a 10% decline in US dollar terms this year, compared with guidance for single-digit declines previously.
ASML Holding NV, the leading producer of chipmaking equipment, warned that politicians seem to be underestimating the complexity of building new fabs. While governments from Washington to Beijing to Berlin want to create domestic chip capabilities, such production is complicated and requires deep expertise.
“People don’t seem to realize that when we start building those fabs across the globe now and are everywhere, that skill has been refined over the last couple of decades in only a few places on the planet — predominantly in Taiwan and in Korea and a bit in China,” said Peter Wennink, chief executive officer of ASML. “Getting access to the requisite skills and skilled workers to keep the construction plan on time is a challenge.”
--With assistance from Adrian Kennedy.
(Updates with ASML comments from sixth paragraph)
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