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Browse files- .gitattributes +12 -0
- README.md +152 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q2_K.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_L.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_M.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_S.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_0.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_K_M.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_K_S.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_0.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_K_M.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_K_S.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q6_K.gguf +3 -0
- VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q8_0.gguf +3 -0
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VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q8_0.gguf filter=lfs diff=lfs merge=lfs -text
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README.md
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| 1 |
+
---
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| 2 |
+
library_name: transformers
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| 3 |
+
tags:
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| 4 |
+
- verilog
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| 5 |
+
- reasoning
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| 6 |
+
- reinforcement-learning
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| 7 |
+
- rtl
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| 8 |
+
- TensorBlock
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| 9 |
+
- GGUF
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| 10 |
+
base_model: Nellyw888/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb
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| 11 |
+
---
|
| 12 |
+
|
| 13 |
+
<div style="width: auto; margin-left: auto; margin-right: auto">
|
| 14 |
+
<img src="https://i.imgur.com/jC7kdl8.jpeg" alt="TensorBlock" style="width: 100%; min-width: 400px; display: block; margin: auto;">
|
| 15 |
+
</div>
|
| 16 |
+
|
| 17 |
+
[](https://tensorblock.co)
|
| 18 |
+
[](https://twitter.com/tensorblock_aoi)
|
| 19 |
+
[](https://discord.gg/Ej5NmeHFf2)
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| 20 |
+
[](https://github.com/TensorBlock)
|
| 21 |
+
[](https://t.me/TensorBlock)
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| 22 |
+
|
| 23 |
+
|
| 24 |
+
## Nellyw888/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb - GGUF
|
| 25 |
+
|
| 26 |
+
<div style="text-align: left; margin: 20px 0;">
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| 27 |
+
<a href="https://discord.com/invite/Ej5NmeHFf2" style="display: inline-block; padding: 10px 20px; background-color: #5865F2; color: white; text-decoration: none; border-radius: 5px; font-weight: bold;">
|
| 28 |
+
Join our Discord to learn more about what we're building ↗
|
| 29 |
+
</a>
|
| 30 |
+
</div>
|
| 31 |
+
|
| 32 |
+
This repo contains GGUF format model files for [Nellyw888/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb](https://huggingface.co/Nellyw888/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb).
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| 33 |
+
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| 34 |
+
The files were quantized using machines provided by [TensorBlock](https://tensorblock.co/), and they are compatible with llama.cpp as of [commit b5753](https://github.com/ggml-org/llama.cpp/commit/73e53dc834c0a2336cd104473af6897197b96277).
|
| 35 |
+
|
| 36 |
+
## Our projects
|
| 37 |
+
<table border="1" cellspacing="0" cellpadding="10">
|
| 38 |
+
<tr>
|
| 39 |
+
<th colspan="2" style="font-size: 25px;">Forge</th>
|
| 40 |
+
</tr>
|
| 41 |
+
<tr>
|
| 42 |
+
<th colspan="2">
|
| 43 |
+
<img src="https://imgur.com/faI5UKh.jpeg" alt="Forge Project" width="900"/>
|
| 44 |
+
</th>
|
| 45 |
+
</tr>
|
| 46 |
+
<tr>
|
| 47 |
+
<th colspan="2">An OpenAI-compatible multi-provider routing layer.</th>
|
| 48 |
+
</tr>
|
| 49 |
+
<tr>
|
| 50 |
+
<th colspan="2">
|
| 51 |
+
<a href="https://github.com/TensorBlock/forge" target="_blank" style="
|
| 52 |
+
display: inline-block;
|
| 53 |
+
padding: 8px 16px;
|
| 54 |
+
background-color: #FF7F50;
|
| 55 |
+
color: white;
|
| 56 |
+
text-decoration: none;
|
| 57 |
+
border-radius: 6px;
|
| 58 |
+
font-weight: bold;
|
| 59 |
+
font-family: sans-serif;
|
| 60 |
+
">🚀 Try it now! 🚀</a>
|
| 61 |
+
</th>
|
| 62 |
+
</tr>
|
| 63 |
+
|
| 64 |
+
<tr>
|
| 65 |
+
<th style="font-size: 25px;">Awesome MCP Servers</th>
|
| 66 |
+
<th style="font-size: 25px;">TensorBlock Studio</th>
|
| 67 |
+
</tr>
|
| 68 |
+
<tr>
|
| 69 |
+
<th><img src="https://imgur.com/2Xov7B7.jpeg" alt="MCP Servers" width="450"/></th>
|
| 70 |
+
<th><img src="https://imgur.com/pJcmF5u.jpeg" alt="Studio" width="450"/></th>
|
| 71 |
+
</tr>
|
| 72 |
+
<tr>
|
| 73 |
+
<th>A comprehensive collection of Model Context Protocol (MCP) servers.</th>
|
| 74 |
+
<th>A lightweight, open, and extensible multi-LLM interaction studio.</th>
|
| 75 |
+
</tr>
|
| 76 |
+
<tr>
|
| 77 |
+
<th>
|
| 78 |
+
<a href="https://github.com/TensorBlock/awesome-mcp-servers" target="_blank" style="
|
| 79 |
+
display: inline-block;
|
| 80 |
+
padding: 8px 16px;
|
| 81 |
+
background-color: #FF7F50;
|
| 82 |
+
color: white;
|
| 83 |
+
text-decoration: none;
|
| 84 |
+
border-radius: 6px;
|
| 85 |
+
font-weight: bold;
|
| 86 |
+
font-family: sans-serif;
|
| 87 |
+
">👀 See what we built 👀</a>
|
| 88 |
+
</th>
|
| 89 |
+
<th>
|
| 90 |
+
<a href="https://github.com/TensorBlock/TensorBlock-Studio" target="_blank" style="
|
| 91 |
+
display: inline-block;
|
| 92 |
+
padding: 8px 16px;
|
| 93 |
+
background-color: #FF7F50;
|
| 94 |
+
color: white;
|
| 95 |
+
text-decoration: none;
|
| 96 |
+
border-radius: 6px;
|
| 97 |
+
font-weight: bold;
|
| 98 |
+
font-family: sans-serif;
|
| 99 |
+
">👀 See what we built 👀</a>
|
| 100 |
+
</th>
|
| 101 |
+
</tr>
|
| 102 |
+
</table>
|
| 103 |
+
|
| 104 |
+
## Prompt template
|
| 105 |
+
|
| 106 |
+
```
|
| 107 |
+
<s>[INST] <<SYS>>
|
| 108 |
+
{system_prompt}
|
| 109 |
+
<</SYS>>
|
| 110 |
+
|
| 111 |
+
{prompt} [/INST]
|
| 112 |
+
```
|
| 113 |
+
|
| 114 |
+
## Model file specification
|
| 115 |
+
|
| 116 |
+
| Filename | Quant type | File Size | Description |
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| 117 |
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| -------- | ---------- | --------- | ----------- |
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| 118 |
+
| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q2_K.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q2_K.gguf) | Q2_K | 2.533 GB | smallest, significant quality loss - not recommended for most purposes |
|
| 119 |
+
| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_S.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_S.gguf) | Q3_K_S | 2.948 GB | very small, high quality loss |
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| 120 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_M.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_M.gguf) | Q3_K_M | 3.298 GB | very small, high quality loss |
|
| 121 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_L.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q3_K_L.gguf) | Q3_K_L | 3.597 GB | small, substantial quality loss |
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| 122 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_0.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_0.gguf) | Q4_0 | 3.826 GB | legacy; small, very high quality loss - prefer using Q3_K_M |
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| 123 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_K_S.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_K_S.gguf) | Q4_K_S | 3.857 GB | small, greater quality loss |
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| 124 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_K_M.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q4_K_M.gguf) | Q4_K_M | 4.081 GB | medium, balanced quality - recommended |
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| 125 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_0.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_0.gguf) | Q5_0 | 4.652 GB | legacy; medium, balanced quality - prefer using Q4_K_M |
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| 126 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_K_S.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_K_S.gguf) | Q5_K_S | 4.652 GB | large, low quality loss - recommended |
|
| 127 |
+
| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_K_M.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q5_K_M.gguf) | Q5_K_M | 4.783 GB | large, very low quality loss - recommended |
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| 128 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q6_K.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q6_K.gguf) | Q6_K | 5.529 GB | very large, extremely low quality loss |
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| 129 |
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| [VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q8_0.gguf](https://huggingface.co/tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF/blob/main/VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q8_0.gguf) | Q8_0 | 7.161 GB | very large, extremely low quality loss - not recommended |
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| 130 |
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| 131 |
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| 132 |
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## Downloading instruction
|
| 133 |
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|
| 134 |
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### Command line
|
| 135 |
+
|
| 136 |
+
Firstly, install Huggingface Client
|
| 137 |
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|
| 138 |
+
```shell
|
| 139 |
+
pip install -U "huggingface_hub[cli]"
|
| 140 |
+
```
|
| 141 |
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|
| 142 |
+
Then, downoad the individual model file the a local directory
|
| 143 |
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|
| 144 |
+
```shell
|
| 145 |
+
huggingface-cli download tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF --include "VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q2_K.gguf" --local-dir MY_LOCAL_DIR
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| 146 |
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```
|
| 147 |
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|
| 148 |
+
If you wanna download multiple model files with a pattern (e.g., `*Q4_K*gguf`), you can try:
|
| 149 |
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|
| 150 |
+
```shell
|
| 151 |
+
huggingface-cli download tensorblock/Nellyw888_VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-GGUF --local-dir MY_LOCAL_DIR --local-dir-use-symlinks False --include='*Q4_K*gguf'
|
| 152 |
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```
|
VeriReason-codeLlama-7b-RTLCoder-Verilog-GRPO-reasoning-tb-Q2_K.gguf
ADDED
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