<p>Copying asker's own answer, so that this question can be removed from the unanswered queue (assuming this answer gets upvoted).</p>

<blockquote>
  <p>I have found out how to get rid of the problem: Setting the start volt 0.05 below max. voltage on all loops seems to have made it more stable and the problem vanished... I still don´t know how it came about but at least I found a workaround :)</p>
</blockquote>

CC BY-SA 3.0
2015-11-07T14:59:25.070Z
2015-11-07T14:59:25.070Z
Nate Eldredge
<p>One of the loops on my Spondoolies SP20 is misbehaving. I underclocked everything but this loop (number 4) does not seem to care what settings I make. It seems to be running at twice the speed (and wattage) at times.</p>

<p>Why is this?</p>

<p><img src="https://i.sstatic.net/JPQaA.png" alt="loopiscrazy"></p>

<p>Transcription:</p>

<pre><code>Asic Stats


Uptime:502 | FPGA ver:100 
-----BOARD-0-----
PSU[UNKNOWN]: 0-&gt;120w[120 120 120] (-&gt;120w[120 120 120]) (lim=120) 0c cooling:0/0x0
-----BOARD-1-----
PSU[UNKNOWN]: 0-&gt;120,[120 120 120] (-&gt;120w(120 120 120]) (lim=120) 0c cooling:0/0x0
-----BOARD-2-----
PSU[UNKNOWN]: 0-&gt;121w(121 121 121] (-&gt;121w(121 121 121]) (lim=120) 0c cooling:0/0x0
-----BOARD-3-----
PSU[UNKNOWN]: 0-&gt;194w[193 193 194] (-&gt;194w(193 193 194]) (lim=120) 0c cooling:0/0x0
LOOP(0) ON
 0: DC2DC/1/:[vlt1:605 vlt2:610(DC1:794 T1:794 U1:727) 46W  76A 41c] ASIC:( 85c (125c) 670hz(BL: 670) 17 (E:192) F:8]
 1: DC2DC/1/:[vlt1:605 vlt2:610(0C1:794 T1:794 U1:727) 44W  72A 48c] ASIC:[ 85c (125c) 645hz(BL: 645) 15 (E:192) F:0] 
LOOP[1] ON
 2: DC2DC/1/:(vlt1:593 vlt2:597(DC1:794 T1:794 U1:727) 43W  73A 53c] ASIC:[ 85c (125c) 640hz(BL: 640)  9 (E:193) F:0]
 3: DC2DC/1/:(vlt1:593 vlt2:597(DC1:794 T1:794 U1:727) 47W  79A 56C] ASIC:[ 85c (125c) 675hz(BL: 675) 17 (E:192) F:8]
LOOP[2] ON
 4: DC2DC/1/:(vlt1:599 vlt2:605(DC1:794 T1:794 U1:727) 45W  75A 41c] ASIC:[ 85c (225c) 660hz(BL: 660) 18 (E:193) F:0]
 5: DC2DC/1/:(vlt1:601 vlt2:605(DC1:794 T1:794 U1:727) 46W  76A 52c] ASIC:[ 85c (225c) 675hz(BL: 675) 15 (E:193) F:0]
LOOP[3] ON
 6: DC2DC/1/:(vlt1:654 vlt2:658(DC1:794 T1:794 U1:727) 74W 113A 68c] ASIC:[ 85c (125c) 895hz(BL: 895) 30 (E:192) F:0]
 7: DC2DC/1/:[vlt1:654 vlt2:658(DC1:794 T1:794 U1:727) 75W 114A 77c] ASIC:[100c (125c) 905hz(BL: 905) 23 (E:193) F:0]

[H:HW:1112GH,W:423,L:0,A:8,MMtmp:0 TMP:(28)=&gt;=&gt;=&gt;(49,64)]
Pushed 28 jobs , in NW queue 4 jobs (sw:0, hw:0)!
min:14 wins:144[this/last min:6/18] bist-fail:253, hw-err:1
leading-zeroes:42 idle promils[s/m]:0/0, rate:1258gh/s asic-count:80 (wins:3+3)
Fan:70, conseq:200
AC2DC BAD: 0 0
R/NR: 487/0
RTF asics: 0
FET: 0:9 1:9
 0 restarted      0 reset          0 reset2         0 fake_wins
 0 stuck_bist     0 low_power      0 stuck_pll      0 runtime_dsble
 0 purge_queue    0 read_timeouts  0 dc2dc_i2c       0 read_tmout2   0 read_crptn
 0 purge_queue3   0 bad_idle 
 0 err_murata 
Adapter queues: rsp=2, req=20 
</code></pre>

<p><strong>EDIT</strong>: I have found out how to get rid of the problem: Setting the start volt 0.05 below max. voltage on all loops seems to have made it more stable and the problem vanished... I still don´t know how it came about but at least I found a workaround :)</p>

CC BY-SA 3.0
2015-01-10T01:11:13.223Z
What miner software are you using?
Nick ODell
CC BY-SA 3.0
2015-01-10T05:14:26.303Z
CGMiner as part of the original software on the SP20
Foxy
CC BY-SA 3.0
2015-01-10T16:07:09.070Z
@Foxy, I'm glad you've found the solution. If you answer your own question and mark the question as answered, it would help anyone else who had this problem find the answer quickly.
morsecoder
<mining-hardware><asic><cgminer><mining-setup>
What could be the reason for one loop being significantly more power hungry on an SP20?
Foxy
# What could be the reason for one loop being significantly more power hungry on an SP20?

(Asked by: username_0 on 2015-01-09)

One of the loops on my Spondoolies SP20 is misbehaving. I underclocked everything but this loop (number 4) does not seem to care what settings I make. It seems to be running at twice the speed (and wattage) at times.

Why is this?

![loopiscrazy](https://i.sstatic.net/JPQaA.png)

Transcription:

```
Asic Stats

Uptime:502 | FPGA ver:100 
-----BOARD-0-----
PSU[UNKNOWN]: 0->120w[120 120 120] (->120w[120 120 120]) (lim=120) 0c cooling:0/0x0
-----BOARD-1-----
PSU[UNKNOWN]: 0->120,[120 120 120] (->120w(120 120 120]) (lim=120) 0c cooling:0/0x0
-----BOARD-2-----
PSU[UNKNOWN]: 0->121w(121 121 121] (->121w(121 121 121]) (lim=120) 0c cooling:0/0x0
-----BOARD-3-----
PSU[UNKNOWN]: 0->194w[193 193 194] (->194w(193 193 194]) (lim=120) 0c cooling:0/0x0
LOOP(0) ON
 0: DC2DC/1/:[vlt1:605 vlt2:610(DC1:794 T1:794 U1:727) 46W  76A 41c] ASIC:( 85c (125c) 670hz(BL: 670) 17 (E:192) F:8]
 1: DC2DC/1/:[vlt1:605 vlt2:610(0C1:794 T1:794 U1:727) 44W  72A 48c] ASIC:[ 85c (125c) 645hz(BL: 645) 15 (E:192) F:0] 
LOOP[1] ON
 2: DC2DC/1/:(vlt1:593 vlt2:597(DC1:794 T1:794 U1:727) 43W  73A 53c] ASIC:[ 85c (125c) 640hz(BL: 640)  9 (E:193) F:0]
 3: DC2DC/1/:(vlt1:593 vlt2:597(DC1:794 T1:794 U1:727) 47W  79A 56C] ASIC:[ 85c (125c) 675hz(BL: 675) 17 (E:192) F:8]
LOOP[2] ON
 4: DC2DC/1/:(vlt1:599 vlt2:605(DC1:794 T1:794 U1:727) 45W  75A 41c] ASIC:[ 85c (225c) 660hz(BL: 660) 18 (E:193) F:0]
 5: DC2DC/1/:(vlt1:601 vlt2:605(DC1:794 T1:794 U1:727) 46W  76A 52c] ASIC:[ 85c (225c) 675hz(BL: 675) 15 (E:193) F:0]
LOOP[3] ON
 6: DC2DC/1/:(vlt1:654 vlt2:658(DC1:794 T1:794 U1:727) 74W 113A 68c] ASIC:[ 85c (125c) 895hz(BL: 895) 30 (E:192) F:0]
 7: DC2DC/1/:[vlt1:654 vlt2:658(DC1:794 T1:794 U1:727) 75W 114A 77c] ASIC:[100c (125c) 905hz(BL: 905) 23 (E:193) F:0]

[H:HW:1112GH,W:423,L:0,A:8,MMtmp:0 TMP:(28)=>=>=>(49,64)]
Pushed 28 jobs , in NW queue 4 jobs (sw:0, hw:0)!
min:14 wins:144[this/last min:6/18] bist-fail:253, hw-err:1
leading-zeroes:42 idle promils[s/m]:0/0, rate:1258gh/s asic-count:80 (wins:3+3)
Fan:70, conseq:200
AC2DC BAD: 0 0
R/NR: 487/0
RTF asics: 0
FET: 0:9 1:9
 0 restarted      0 reset          0 reset2         0 fake_wins
 0 stuck_bist     0 low_power      0 stuck_pll      0 runtime_dsble
 0 purge_queue    0 read_timeouts  0 dc2dc_i2c       0 read_tmout2   0 read_crptn
 0 purge_queue3   0 bad_idle 
 0 err_murata 
Adapter queues: rsp=2, req=20 

```

**EDIT**: I have found out how to get rid of the problem: Setting the start volt 0.05 below max. voltage on all loops seems to have made it more stable and the problem vanished... I still don´t know how it came about but at least I found a workaround :)

**Tags:** mining-hardware, asic, cgminer, mining-setup

> **Comments:**
> **username_1**: What miner software are you using?  
> **username_0**: CGMiner as part of the original software on the SP20  
> **username_2**: @username_0, I'm glad you've found the solution. If you answer your own question and mark the question as answered, it would help anyone else who had this problem find the answer quickly.  

---

## 1 answers

### Answer by username_3 on 2015-11-07. Score: 1

Copying asker's own answer, so that this question can be removed from the unanswered queue (assuming this answer gets upvoted).

> I have found out how to get rid of the problem: Setting the start volt 0.05 below max. voltage on all loops seems to have made it more stable and the problem vanished... I still don´t know how it came about but at least I found a workaround :)


---

