Hey, Intel and Micron: XPoint is phase-change memory, right? Or is it? Yes. No. Yes
People in (chalcogenide) glass houses shouldn't throw stones
Chris Mellor Tue 19 Jan 2016 // 12:58 UTC
Comment So, is XPoint memory phase-change memory ... or not? An IM Flash Technologies co-CEO just gave a strong signal it might be phase-change, but doubt remains as Intel and Micron have kept their secret process ingredient hidden.
IMFT is the Intel/Micron joint venture to manufacture flash chips in Lehi, Utah. Guy Blalock and Keyvan Esfarjani are the co-CEOs. Esfarjani is a veep in Intel's Technology and Manufacturing Group and Executive Officer for IM Flash Technologies, responsible for co-leading the joint venture. Blalock represents the Micron side of the IMFT house.
On 12 January at Semi, a chip technology and manufacturing trade show at Half Moon Bay, California, Blalock talked about 3D XPoint memory, the Intel/Micron 1000-times-faster-than-NAND new non-volatile memory technology that is set to revolutionise servers and storage by functioning as persistent memory.
His session abstract said: "3D XPoint specifically offers a path to provide massive amounts of memory storage at a latency rate sufficient to place it in close proximity to the CPU." That's in keeping with all the messages put out by Intel and Micron.
Until now, the companies have refused to say what the XPoint non-volatile memory material is, affirming repeatedly that it is not phase-change memory, but that it is a bulk-change material, and digital information (binary 1 or 0) is carried by its resistance level, which is affected predictably by the bulk change.
Phase-change memory, to recap, is a chalcogenide (glass-like) material which changes its internal state from amorphous to crystalline and back again when the appropriate amount of electricity is applied to it. The state change has an associated resistance change, and reading the resistance level reveals the binary value of the resistance level.
Many suppliers have been trying to develop phase-change memory products to escape from the NAND scaling trap, whereby NAND ceases to function reliably if its cell size drops below 10nm.
When Intel and Micron announced their 3D XPoint memory in July last year it sounded fabulous: 1,000 times faster to access than flash, 1,000 times the endurance, scope for lithography shrinks, scope for adding layers to the existing two, and a cost less than DRAM.
It astonished the technology world, which spent hundreds of man hours trying to work out how Intel and Micron had cracked a technology challenge nobody else had managed to solve, not even HPE Labs with its always-delayed Memristor tech, developed by rooms full of wall-to-wall PhDs.
So there was interest in what Blalock had to say but no expectation that he reveal the nature of the XPoint material. Yet he did. But get this: as reported in EE Times Blalock said that "chalcogenide material and an Ovonyx switch are magic parts of this technology with the original work starting back in the 1960s".
Oh really, Mr. Micron man. Let's recap:
Phase-change memory is a non-volatile, chalcogenide material exhibiting a bulk change in state with altered resistance levels
XPoint is not phase change memory, but
It is non-volatile
It uses a bulk-change effect
The bulk change affects its resistance level
The material is a chalcogenide
Black is not white but it's spelt F, O, and G.
Is it or isn't it phase-change memory?
A comment by 3D Guy to the EE Times article said: "Rebranded phase-change memory with an OTS, as many of us knew ... This 3D XPoint PR, where they tried to not brand it as PCM to get more interest, is a classic example of marketing teams going wild".
But it may be that "rather than 'marketing teams going wild', or an attempt at some form of juvenile deception, one interpretation [is] they got caught up with the need to demonstrate Intel's diversification in light of the PC slowdown and now have to back off a bit," said commentator Ron Neale.
Jim Handy, semiconductor analyst at Objective Analysis, said: "Intel and Micron insist that 3D XPoint is not phase-change memory, but they give very strong indicators that it's the same thing. For example, when asked about the technology at launch, Intel Fellow Al Fazio stated that it's the most mature of any of the emerging memory technologies, which he also said about PCM back in a presentation he made in 2011."
"My guess is that the companies have found a way to make the same materials behave in a slightly different way," he continued. "Chalcogenide glasses are the basis of numerous emerging memory technologies such as oxygen vacancy and silver dendrites, so they don't necessarily have to use the phase-change mechanism to achieve bit storage."
Does this point matter?
"In the long run this argument matters very little to anyone who isn't making the chips. What matters most, and what is the focus of our 3D XPoint report, is that Intel is creating a new layer in the memory hierarchy, and this has serious implications on both computing and the DRAM market," said Handy.
If it walks like a duck, quacks like a duck, swims like a duck, and eats like a duck then it still might not be a freaking duck. Aarghh. ®
Chinese boffins on 3D XPoint: If it works like phase-change memory, it's probably phase-change memory
Analysis Intel says no
IBM's Phase Change Memory computer can tell you if it's raining
Wait! A PCM chip that computes as well as stores?!
You know what's besides the XPoint, Intel? Somebody else's storage-class memory – SK Hynix
Another vendor mounts the crossbars
New year, new rant: Linus Torvalds rails at Intel for 'killing' the ECC industry
Updated Why do most PCs not support error-correcting code? Chipzilla is to blame, says Linux don
Drifting phases and noise in phase-change memory
Big Blue research gnomes of Zurich crack a problem
Hold the DRAM phone: IBM claims phase-change breakthrough
Smaller, faster, denser - the future of commercial memory?
Intel and Micron's XPoint: Is it PCM? We think it is
What do you think? Micron wasn't super-clear
Shared memory vulnerability in IBM's Db2 database could let nefarious insiders wreak havoc – so get patching
Lack of protections around trace facility gives local users read and write access