Not content with just locking its multipliers, the intel empire has apprently taken another step to stamp out overclocking by locking Alderwoods FSB above 12% of its specified speed! A leading motherboard manufacturer confirmed the limit to Custom PC, although the companny, which wished to remain anonymous, insisted its was for practical reasons (yeah right) Acording to the company the new 16bit PCI Express will hang if FSB is taken beyond 12%, "while most new VGA cards cant tolerate such a high bus speeds" Some have speculated that the limit might also be related to intel's overclocking detection circuits, which was patented in march 2003 (see patent number 6,535,988 at http://patft.uspto.gov, although intel denied the link as rumor and speculation.
I found this over at VR-Zone.
Pretty much all the references I can find in a Google search all end up back at the VR-Zone quote.
Thanks Gizmo, I've updated our Front page post.
I'm not sure it'd make that much sense putting the limit on the chipset, as opposed to putting it on the CPU. To my mind, it makes more sense to implement this on the CPU, rather than the chipset. Manufacturers other than Intel can make chipsets for P4 processors, so the problem with remarking still exists.
Quite frankly does this mean bad news? Hey, it would open the door for AMD tho!
So you think that is what this is all about? People taking 166 MHz chips and remarking them as 200 MHz?
I guess that is about the only thing that would make sense. However, you are right that it would only have value if you do it on the CPU. In any case, the patent refers to using a stable crystal reference. If the reference clock is external to the CPU, then it won't take too much engineering to get around that, unless that clock is intrinsic to some internal CPU timing that just CAN'T be mucked with.
Quite frankly im never suprised by anything that happens in computer hardware. i mean check this site out, www.hpcx.ac.uk Its a high powered computer based at the laboratory i work at!
The HPCx system is located at the UK's CCLRC's Daresbury Laboratory and operated by the HPCx Consortium.
The HPCx system uses IBM p690+ Regatta nodes for the compute and IBM p690 Regatta nodes for login and disk I/O. Each Regatta node contains 32 processors. At present there are two p690 service nodes. At the beginning of the user service on HPCx phase2 in April 2004, twenty p690+ nodes were used for compute jobs, offering a total of 640 processors. From Monday, 10 May, there were 38 frames, i.e. 1216 processors, available to users. Then the system had a throughput of at least 4.8 Tflops (4800 AU/hr). This was increased to 50 nodes offering 1600 processors end of May 2004. The peak computational power of the HPCx system is 10.8 Tflops peak, or at least 6 Tflops sustained. The complete new platform gave a value of 6,188 Gflops for the Rmax value of the Linpack benchmark. The service can thus provide 6,188 AUs per hour, 148,512 AUs per day.
Each Regatta system frame consists of 32 1.7 GHz POWER4 processors. In the POWER4 architecture, a chip contains two processors, together with the Level 1 (L1) and Level 2 (L2) cache. Each processors has its own L1 instruction cache of 128 kB and L1 data cache of 64 kB integrated onto one chip. Also on board the chip is the L2 cache (instructions and data) of 1.5 MByte, which is shared between the two processors. Four chips (8 processors) are integrated into a multi-chip module (MCM). Four MCMs (32 processors) comprise one frame. Each MCM is configured with 128 MB of L3 cache and 8 GB of main memory. The total L3 cache of 512 MB per frame and the total main memory of 32 GB per frame is shared between the 32 processors of the frame.
Think you could convince them to fold for us?
No matter how much i could try i think the answer to that question is ..... NO. their dead funny about anyone seeing the thing. ive only ever been in the room once! it was so noisy, 1 million punds worth of cooling!
Darn. Well, I had to ask.
Even though i dont oc (right now) i dont like indusrty steps to close posibilitys. If Intel is serious like this amd might start pushing an oc line of parts. (really tolerance strict boards, that stuff.) Just a thought. - Like anyone who uses copy protected disks. I just want to make a backup and it slows me down but the protection swont stop people who want to make money. they have the time to break it. i tried and after 2-3 days i go thte disk coppied but it wond play and i still need a patch.
I guess that is about the only thing that would make sense.
I'm struggling to see why Intel would directly limit clock speed otherwise. Doing it to stop overclockers would seem to be rather petty, and I don't see what that gains Intel. The only other possible reason I could come up with is that Intel is seeing too high a percentage of returns due to overclocking induced damage.
That is basically what AMD is doing with the AthlonFX. The multis are unlocked, and the chip is designed to be a performance part with exactly one speed grade (really freaking fast) and you pay mucho dinero for it.